MC-DAC Loop Regulation With Digital Filtering and Reduced Die Area
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Solution Overview
Problem
Existing digital-to-analog converter (DAC) systems in phase-locked loops require significant die area for regulation loops, often incorporating analog filters that increase complexity and area usage, limiting flexibility and power supply rejection performance.
Innovation Solution
A flexible multiplying capacitive digital-to-analog converter (MC-DAC) circuit that selectively couples to multiple reference voltages, coupled with a capacitive level shifter and re-sampling circuit, reduces die area by generating a gate control signal for power switches, eliminating the need for analog filters and enabling programmable resolution and range settings.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If analog filters are used in the regulation loop, then filtering performance is improved, but die area and circuit complexity increase
Solution Approach 1:
The patent removes analog filters from the regulation loop, extracting this filtering function entirely from the analog domain. The digital filter processes the error signal digitally, eliminating the need for physical analog filter components and their associated die area while maintaining filtering performance through digital signal processing.
Solution Approach 2:
The patent replaces the analog filter (a physical/mechanical filtering system) with a digital filter implemented in the digital domain. This substitution uses digital signal processing algorithms to achieve filtering effects without requiring physical filter components, thereby reducing die area and complexity.
2Reliability
If analog filters are used in the regulation loop, then filtering performance is improved, but device complexity increases
Solution Approach 1:
The patent extracts the filtering function from the analog domain and relocates it to the digital domain. This removes complex analog filter circuitry (including capacitors, resistors, and operational amplifiers) and replaces it with a digital filter implemented through logic circuits and algorithms, simplifying the overall device architecture.
Solution Approach 2:
The patent substitutes the analog filter system with a digital filter system, replacing physical filtering components with digital signal processing. This reduces device complexity by eliminating the need for precise analog component matching, reducing the number of analog stages, and simplifying the overall circuit design.
3Ease of operation
If traditional DAC circuits are used, then voltage conversion is achieved, but signal deviation and PSR performance deteriorate
Solution Approach 1:
The patent employs a dynamic element matching technique where the capacitance values in the DAC are dynamically adjusted based on operating conditions. This allows the DAC to maintain optimal performance across different signal levels and frequencies, reducing signal deviation and improving power supply rejection by adapting to changing circuit conditions in real-time.
Solution Approach 2:
The patent changes the capacitance parameters dynamically to optimize DAC performance. By adjusting capacitance values based on the operating point and signal characteristics, the system achieves better linearity, reduced signal deviation, and improved PSR performance while maintaining ease of voltage conversion operation.
4Reliability
If regulation loop components are increased for better performance, then PSR performance is improved, but die area increases
Solution Approach 1:
The patent extracts the filtering function from the analog regulation loop and implements it digitally. This eliminates the need for additional analog components (such as filter capacitors and resistors) that would increase die area, while maintaining or improving PSR performance through digital signal processing techniques.
Solution Approach 2:
The digital filter in the patent serves multiple functions simultaneously: it filters the error signal, performs signal processing, and contributes to overall loop stability. This multi-functionality achieves improved PSR performance without requiring separate dedicated components, thereby avoiding die area increases.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The MC-DAC solution reduces the total area of the regulation loop, enhances power supply rejection performance, and allows for fine control of gate control voltage, enabling efficient power delivery with reduced signal deviations and improved PSR performance.
Implementation Method 1
A capacitive level shifter may be coupled to the output of the DAC. The capacitive level shifter may include a second capacitor having a second node B and a third node C, the second node B coupled to a third reference voltage through a third switch and coupled to a fourth reference voltage through a fourth switch
Implementation Method 2
A re-sampling circuit may be coupled to the output of the capacitive level shifter to generate a gate control signal to control the one or more power switches
Implementation Method 3
A flexible multiplying capacitive digital-to-analog converter (MC-DAC) circuit that selectively couples to multiple reference voltages, coupled with a capacitive level shifter and re-sampling circuit, reduces die area by generating a gate control signal for power switches
Data Source
AI summary
Apparatus and associated methods relate to providing a regulation loop using a digital representation of a loop error signal along with a flexible multiplying capacitive digital-to-analog converter (MC-DAC) circuit to control one or more power switches (e.g., transistors) delivering required power (including voltage and/or current) to a load circuit. In an illustrative example, the MC-DAC circuit may include a digital-to-analog converter (DAC) configured to selectively couple to two different reference voltages in response to switch control signals generated by a digital filter. A capacitive level shifter may be coupled to the output of the DAC. A re-sampling circuit may be coupled to the output of the capacitive level shifter to generate a gate control signal to control the one or more power switches. The regulation loop may advantageously generate the gate control signal using a substantially reduced die area.