Multi-Chip Module Infield Scan Coverage via High-Speed IO
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Solution Overview
Problem
Current solutions fail to provide effective infield testing for functional safety in autonomous driving systems, particularly in ensuring high computational capabilities and scan coverage for Multi-Chip Modules (MCMs), with existing Logic Built-in Self-Test (LBIST) methods being insufficient and lacking mechanisms for offloading data between chips during infield testing.
Innovation Solution
A high-speed input/output interface system is implemented, utilizing a Master Chip and Slave Chip configuration with a Functional Safety Engine to enable infield testing, using a modified MIPI Alliance I3C multi-lane interface for data offloading and communication between chips, allowing for scalable bandwidth and dynamic frequency scaling, and enabling in-band interrupts for efficient data transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If Logic Built-in Self-Test (LBIST) is enabled in hybrid mode to meet functional safety requirements, then functional safety coverage is improved, but scan coverage for logic chains remains insufficient
Solution Approach 1:
The testing system is segmented into multiple independent chips (master chip and slave chips) within an MCM package. Each chip can independently perform LBIST while also receiving scan patterns from the master chip, allowing simultaneous execution of functional safety tests and comprehensive scan coverage tests on different segments of the system.
Solution Approach 2:
The master chip serves multiple functions: it acts as a test pattern generator, a controller for coordinating tests across chips, and a participant in the testing process itself. This multi-functionality allows the system to achieve both functional safety coverage and complete scan coverage without requiring separate dedicated testing hardware.
2Manufacturing precision
If top-off scan patterns are applied to achieve complete scan coverage, then scan coverage is improved, but the overall size of test patterns becomes very large requiring off-chip storage
Solution Approach 1:
The solution moves from a single-chip storage model to a distributed multi-chip storage model. Test patterns are distributed across multiple chips in the MCM package, with each chip storing only the portion of patterns needed for its testing. This dimensional change from centralized to distributed storage reduces the storage burden on any single chip while maintaining complete scan coverage capability.
Solution Approach 2:
Multiple chips are merged into a unified testing system where the master chip coordinates scan pattern distribution and the slave chips execute tests. The combined storage capacity and processing power of all chips in the MCM package handle the large test pattern requirements, effectively sharing the burden of storing and processing comprehensive scan patterns.
3Manufacturing precision
If test patterns are stored off-chip and retrieved for infield testing, then complete scan coverage is achieved, but data retrieval speed must be very fast to maintain testing efficiency
Solution Approach 1:
Test patterns are pre-loaded into the MCM package's internal memory or distributed across the chips before the system is deployed to the field. This preliminary action ensures that when infield testing is needed, the patterns are already available in high-speed memory rather than requiring retrieval from external off-chip storage, thus maintaining fast data retrieval speeds while achieving complete scan coverage.
Solution Approach 2:
The MCM package structure itself acts as an intermediary between external storage and the test chips. High-speed interconnects within the MCM package facilitate rapid data transfer between the master chip, slave chips, and any external storage interfaces, mediating the speed requirement by providing a high-bandwidth communication path that bridges the gap between off-chip storage and on-chip testing requirements.
4Power
If Multi-Chip Module (MCM) configuration is used to provide high computational capabilities, then computational capacity is improved, but mechanisms for data offloading and communication between chips during infield testing are lacking
Solution Approach 1:
The MCM package is equipped with self-service capabilities for infield testing. The master chip can autonomously generate test patterns, coordinate testing across all chips, and manage data transfer without requiring external testing equipment. This self-service approach simplifies the overall system complexity by integrating the data offloading and communication mechanisms directly into the MCM package, eliminating the need for complex external testing infrastructure.
Solution Approach 2:
The master chip serves as an intermediary that manages all data offloading and communication between chips during infield testing. It coordinates scan pattern distribution, collects test results from slave chips, and interfaces with any external systems. This centralized intermediary approach provides a simple, unified interface for complex multi-chip communication, reducing overall system complexity while enabling robust data transfer capabilities.
Data Source
AI summary
An apparatus of a multi-chip package (MCP) of a functional safety system, comprises a processor to be configured as a master chip in a master-slave arrangement with a slave chip in the MCP, and a memory coupled to the processor to store one or more infield test scan patterns. The processor includes a bock to couple the master chip to the slave chip via a high-speed input/output (IO) interface to retrieve the one or more infield test scan patterns from the memory via the master chip, and to provide the one or more infield test scan patterns to the slave chip via the high-speed IO interface in response to the functional safety system entering an infield test mode.