Multi-chip Module Thermal Zone Segmentation

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Solution Overview

Problem

Large pad-count integrated circuits face mechanical, electrical, and cost challenges in scaling for capacity and performance due to packaging and thermal issues, particularly with high-speed I/O signals, and optical transceivers are sensitive to temperature and have reliability issues when co-packaged with high-power ICs.

Innovation Solution

A mezzanine-style multi-chip module (MCMezz) design that separates thermal zones by placing semiconductor chips and heat sinks on the top side and optical transceivers with heat sinks on the bottom side of a substrate, using optical connectors for high-speed signals, and incorporating thermal insulation and blindmate features for alignment and cooling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If optical transceivers are co-packaged with high-power ICs, then integration density is improved, but thermal sensitivity and reliability deteriorate

Engineering Contradiction:
Improveintegration densityVSAvoidthermal sensitivity
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent divides the package into distinct thermal zones: a first thermal zone for the high-power IC with aggressive cooling, and a second thermal zone for the optical transceiver with moderate cooling. This segmentation allows each component to operate in its optimal thermal environment, resolving the contradiction between integration density and thermal sensitivity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different cooling strategies are applied to different regions of the package. The high-power IC receives concentrated cooling resources (first heat sink, first cooling fans, first heat pipes) while the optical transceiver receives appropriate but less intensive cooling (second heat sink, second cooling fans, second heat pipes). This local differentiation maintains reliability while achieving integration.

Inventive Principle:
Principle #3Local quality

2Adaptability or versatility

If optical transceivers are co-packaged with high-power ICs, then integration density is improved, but thermal management complexity worsens

Engineering Contradiction:
Improveintegration densityVSAvoidthermal management complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The thermal management system is segmented into independent subsystems: first cooling fans for the high-power IC, second cooling fans for the optical transceiver, first heat pipes connected to the IC, and second heat pipes connected to the transceiver. This modular segmentation simplifies the overall thermal management by making each subsystem independently controllable and manageable.

Inventive Principle:
Principle #1Segmentation

3Quantity of substance

If large pad-count ICs are used for high-speed I/O, then signal capacity is improved, but packaging challenges worsen

Engineering Contradiction:
Improvesignal capacityVSAvoidpackaging challenges
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent transitions from a two-dimensional pad layout to a three-dimensional stacked architecture. Multiple ICs and optical transceivers are vertically arranged on the substrate, with heat sinks and cooling components positioned above and below. This dimensional transition allows high signal capacity while managing packaging complexity through vertical integration.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design enables efficient cooling of high-power ASICs and temperature-sensitive optical transceivers, improves reliability, and simplifies optical cable management, allowing for more robust electrical connections and flexible system configurations while avoiding airflow obstruction.

Implementation Method 1

a first heat sink thermally coupled to the ASIC and a second heat sink thermally coupled to each optical transceiver

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Implementation Method 2

a first cooling fan positioned above the ASIC and a second cooling fan positioned adjacent to each optical transceiver

Methodology Applied
Scientific EffectForced convection: Forced Convection

Implementation Method 3

a first heat pipe extending from the first heat sink to a first location remote from the ASIC and a second heat pipe extending from the second heat sink to a second location remote from the optical transceiver

Methodology Applied
Scientific EffectPhase change: Phase Change

Implementation Method 4

separates thermal zones by placing semiconductor chips and heat sinks on the top side and optical transceivers with heat sinks on the bottom side of a substrate

Methodology Applied
Scientific EffectThermal insulation: Thermal Insulation

Data Source

PatentUS10386590B2Multi-chip module
Publication Date: 2019.08.20 HEWLETT PACKARD ENTERPRISE DEV LP
  • US10386590B2 patent drawing
  • US10386590B2 patent drawing
  • US10386590B2 patent drawing

AI summary

One example of a multi-chip module includes a substrate, a semiconductor chip, and an optical transceiver. The substrate has a first side and a second side opposite the first side. The semiconductor chip is electrically coupled to the first side of the substrate. The optical transceiver is electrically coupled to the second side of the substrate.