MCU Counter Synchronization via Trigger Signal

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Solution Overview

Problem

Interference between control signals generated by timer counter units of multiple microcontrollers due to switching noise, caused by deviations in start timing and clock frequencies, leads to inconsistent output signals.

Innovation Solution

A semiconductor device with a mechanism to synchronize the start timings of counters in multiple microcontrollers by adjusting the count period and duty ratio of one counter based on the difference in count values between counters, using a trigger signal to align the counting cycles.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple MCUs generate control signals independently with different software programs or clock frequencies, then each MCU can operate autonomously, but the control signals interfere with each other due to timing deviations

Engineering Contradiction:
Improveindependent operation capabilityVSAvoidsignal consistency
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent introduces a trigger signal as an intermediary between multiple MCUs. This trigger signal synchronizes the counting operations across different MCUs, ensuring that all counters start and operate at aligned timing intervals. The trigger signal acts as a mediator that coordinates the independent MCUs without constraining their individual software programs or clock frequencies, thus maintaining autonomous operation while eliminating signal interference.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Ease of operation

If counters in multiple MCUs start counting at different timings, then each MCU can execute its software program independently, but the output control signals become inconsistent

Engineering Contradiction:
Improveindependent software executionVSAvoidoutput signal precision
Core Design Contradiction:
Ease of operationVSManufacturing precision

Solution Approach 1:

The patent implements preliminary synchronization by having all counters count up to a predetermined value before generating control signals. This preliminary counting phase ensures that all MCUs are in a synchronized state before output operations begin, allowing independent software execution while maintaining precise and consistent output signal timing.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If different clock frequencies are used in multiple MCUs, then system flexibility is improved, but timing synchronization between control signals deteriorates

Engineering Contradiction:
Improveclock frequency flexibilityVSAvoidtiming synchronization
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent employs periodic triggering where a trigger signal is periodically sent to synchronize the counting operations of all MCUs. This periodic synchronization mechanism allows each MCU to operate with its own clock frequency for flexibility, while the periodic trigger ensures that all control signals are generated at synchronized intervals, preventing timing deviations and maintaining signal consistency.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11017824B2Semiconductor device, control device and control method
Publication Date: 2021.05.25 RENESAS ELECTRONICS CORP
  • US11017824B2 patent drawing
  • US11017824B2 patent drawing
  • US11017824B2 patent drawing

AI summary

An interference of control signals is caused by a deviation in the start timings of counting between counters of timer counter units of a first MCU and a second MCU. And thus, when a count value of the counter of the MCU of a parent reaches a predetermined value D, the MCU of the parent transmits a trigger signal to the MCU of a child. The MCU of the child obtains the time difference between the start timings of the counts of the counters of the parent and the child from the difference between the D and a count value E of the child at that time. A count period of the child until a maximum value of the count value is reached is adjusted by the time difference.