Multi-Core MCU Shared Peripheral Access Using Hardware Semaphores
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Solution Overview
Problem
Multi-core MCUs face conflicts when accessing shared peripherals due to simultaneous access by multiple CPUs, leading to access failures and peripheral malfunction.
Innovation Solution
A control system with storage, processing, and shared modules that generate and manage numerical values to determine access permissions, allowing exclusive access and resolving conflicts through numerical value comparisons and locks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple CPUs access shared peripherals simultaneously, then system productivity is improved, but access conflicts occur causing CPU access failure and peripheral malfunction
Solution Approach 1:
The patent introduces a control register as an intermediary between multiple CPUs and shared peripherals. This control register contains semaphore bits that mediate access requests from different CPUs, ensuring that only one CPU can access a shared peripheral at a time, thus preventing conflicts while maintaining system productivity
Solution Approach 2:
The patent implements preliminary action by requiring CPUs to check and set semaphore bits in the control register before accessing shared peripherals. This preliminary check prevents access conflicts by ensuring that a CPU only proceeds with peripheral access when the semaphore indicates the peripheral is available, avoiding simultaneous access conflicts
2Reliability
If software semaphore registers are used to control access, then access conflicts are partially avoided, but access efficiency decreases due to software overhead
Solution Approach 1:
The patent replaces software-based semaphore mechanisms with hardware-based control registers that can be directly accessed by CPUs. This hardware implementation eliminates the software overhead and complex instruction sequences required for software semaphores, significantly improving access efficiency while maintaining reliable conflict avoidance through direct hardware control of semaphore bits
3Productivity
If direct peripheral access is allowed without semaphore checks, then access speed is improved, but access conflicts and peripheral errors increase
Solution Approach 1:
The patent implements preliminary action by requiring CPUs to check and set semaphore bits in the control register before accessing shared peripherals. This preliminary check prevents access conflicts by ensuring that a CPU only proceeds with peripheral access when the semaphore indicates the peripheral is available, avoiding simultaneous access conflicts
Data Source
AI summary
The present disclosure discloses a control system and related devices for a multi-core MCU to access shared peripherals, the control system comprises: M storage modules, M processing modules, and N shared modules, for the storage module, the processing module, and the shared module connected successively in one line, the processing module is used for reading the first numerical value, and is used for transmitting data to the shared module when judging the first numerical value to be a target value, and is used for reading a second numerical value stored in the shared module after judging the first numerical value is the target value, and locking the corresponding shared module for data transmission according to the second numerical value, the shared module is used to receive the data transmitted by the processing module when judging that the first numerical value is the target value.