MD5 Arithmetic Unit Parallel Carry Look-Ahead Adders

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Solution Overview

Problem

The existing MD5 cryptographic execution units are limited by slower processing speeds and longer processing times due to their architecture, which restricts the rate of data encryption and decryption, especially for large volumes of data like streaming audio or video, and dominates the usage of the peripheral bus system.

Innovation Solution

The implementation of an improved MD5 hash algorithm using multiple carry look-ahead adders and full adders configured to execute simultaneously, along with control logic and shift logic, allows for parallel processing, reducing the number of clock cycles required for each iteration of the MD5 algorithm from 256 to 128.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If traditional sequential adder architecture is used in MD5 cryptographic execution unit, then device complexity is reduced, but processing speed decreases and processing time increases

Engineering Contradiction:
Improveprocessing speedVSAvoidarchitecture complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The patent divides the addition operation into multiple parallel segments using separate adders (first adder, second adder, third adder) that simultaneously process different portions of the cryptographic calculation. This segmentation enables concurrent execution of multiple operations within the same clock cycle, directly increasing processing speed while distributing the computational load across multiple specialized units.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from sequential single-dimensional processing to parallel multi-dimensional processing by introducing multiple adders operating simultaneously. The first, second, and third adders execute in parallel across different computational dimensions, effectively adding a time-parallelism dimension to the architecture that resolves the speed-complexity contradiction.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Loss of time

If parallel processing architecture is implemented, then processing time is reduced, but device complexity increases

Engineering Contradiction:
Improveprocessing timeVSAvoidarchitecture complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The cryptographic processing is segmented into distinct parallel paths using multiple adders, each handling specific portions of the MD5 algorithm. The first adder computes one set of intermediate values while the second and third adders simultaneously compute other required values, reducing total processing time through parallel execution of segmented tasks.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary parallel computations using multiple adders to pre-calculate intermediate values before the final hashing operation. The first, second, and third adders prepare multiple sets of intermediate results in advance, allowing the main processing pipeline to proceed faster with pre-computed data ready.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If multiple parallel adders are used, then cryptographic operation performance is enhanced, but manufacturing complexity increases

Engineering Contradiction:
Improvecryptographic operation performanceVSAvoidmanufacturing complexity
Core Design Contradiction:
ProductivityVSEase of manufacture

Solution Approach 1:

The cryptographic execution unit is segmented into multiple independent adder modules that can be manufactured using standard parallel processing techniques. Each adder (first, second, third) is a discrete functional unit that can be independently designed, tested, and manufactured, simplifying the overall manufacturing process despite the increased number of components.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS7401110B1System, method and apparatus for an improved MD5 hash algorithm
Publication Date: 2008.07.15 ORACLE AMERICAN INC
  • US7401110B1 patent drawing
  • US7401110B1 patent drawing
  • US7401110B1 patent drawing

AI summary

An MD5 arithmetic unit including multiple carry look-ahead adders. The carry look-ahead adders are configured to execute substantially simultaneously. A method of executing an MD5 algorithm is also disclosed.