Switched-Capacitor MDAC Common-Mode Hop Regulation

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Solution Overview

Problem

Switched-capacitor circuits, particularly in pipelined ADCs, face issues with common mode voltage changes when using the same capacitors for sampling and subtraction, leading to performance degradation in MDAC amplifiers due to deviations from preferred input common mode voltage ranges.

Innovation Solution

A switched-capacitor MDAC with first and second arrays of capacitor circuits, a feedback-configured amplifier, and a common-mode reference signal generator that generates a controlled common-mode reference signal to set the amplifier input voltage within desired ranges, accounting for differences in analog input and reference voltages during sampling and hold phases.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the same capacitors are used for both sampling the analog input signal and generating/subtracting the analog output signal, then circuit area and component count are reduced, but common mode voltage changes occur at the amplifier input

Engineering Contradiction:
Improvecircuit areaVSAvoidcommon mode voltage changes
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

A common mode reference signal generator is introduced as an intermediary component that generates a controlled common mode reference signal. This reference signal is applied to the capacitor arrays during the sample phase to counteract the common mode voltage changes that would otherwise occur at the amplifier input during the hold phase, thereby mediating between the space-saving capacitor sharing approach and the amplifier's common mode voltage requirements

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The common mode reference signal generator dynamically adjusts the common mode voltage level applied to the capacitors during the sample phase. By changing this parameter (the common mode reference signal voltage), the system compensates for the common mode voltage changes that occur when the capacitors switch from sampling the analog input to generating the analog output, ensuring the amplifier input remains within its preferred common mode range

Inventive Principle:
Principle #35Parameter changes

2Reliability

If the same capacitors are used for both sampling and subtraction functions, then feedback factor increases and noise is reduced, but amplifier performance degrades due to common mode voltage deviations

Engineering Contradiction:
Improvenoise performanceVSAvoidamplifier performance
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The common mode reference signal generator acts as a mediator that preserves the benefits of capacitor sharing (high feedback factor, low noise) while protecting the amplifier from common mode voltage deviations. By injecting the appropriate common mode reference signal during sampling, it ensures the amplifier operates within its optimal common mode range throughout both sample and hold phases

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The system applies preliminary anti-action by generating the common mode reference signal during the sample phase that anticipates and counteracts the common mode voltage changes that will occur during the subsequent hold phase. This preliminary compensation prevents the amplifier performance degradation before it can occur

Inventive Principle:
Principle #9Preliminary anti-action

3Ease of operation

If common mode voltage is allowed to change freely during capacitor switching, then circuit operation is simplified, but amplifier input common mode voltage range is exceeded

Engineering Contradiction:
Improvecircuit operationVSAvoidamplifier performance
Core Design Contradiction:
Ease of operationVSReliability

Solution Approach 1:

The common mode reference signal generator implements a feedback mechanism where the common mode voltage requirements of the amplifier are taken into account when generating the reference signal. This feedback ensures that the common mode voltage at the amplifier input is maintained within the preferred range, preventing reliability issues while keeping the circuit operation relatively simple

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS8643527B2Switched-capacitor MDAC with common-mode hop regulation
Publication Date: 2014.02.04 ANALOG DEVICES INC
  • US8643527B2 patent drawing
  • US8643527B2 patent drawing
  • US8643527B2 patent drawing

AI summary

A switched-capacitor digital-to-analog converter (DAC) circuit can include first and second sets of capacitors, an amplifier, a reference signal generator and interconnecting switches. The first and second sets of capacitors can be connected to first and second analog input signals responsive to a first clock signal, and to first and second reference voltages responsive to a second clock signal and digital control signals. The amplifier can be connected to the first and second sets of capacitors in response to the second clock signal. The reference signal generator can provide to the first and second sets of capacitors, responsive to the first clock signal, a common-mode reference signal to set a common-mode voltage at inputs of the amplifier, and can include components to replicate the operation of the first and second sets of capacitors. The switched-capacitor DAC circuit can be used to implement a multiplying DAC in a pipeline analog-to-digital converter.