Pre-Sampling MDAC Switching to Cut Pipelined ADC Calibration
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Solution Overview
Problem
Conventional pipelined analog-to-digital converters (ADCs) are susceptible to component mismatch and circuit imperfections, leading to high power consumption and the need for background calibration, which increases costs and inefficiencies.
Innovation Solution
A multiplying digital-to-analog converter (MDAC) with pre-sampling and a pipelined ADC that utilizes an operational amplifier, sampling capacitor circuit, and switch circuit to control connections between capacitors, allowing for power relaxation and reference buffer power relaxation without background calibration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If high gain and high speed operational amplifiers are used in typical pipelined ADCs, then conversion speed and accuracy are improved, but power consumption increases and background calibration is required
Solution Approach 1:
The patent applies preliminary action by performing pre-sampling of the input signal before the main conversion process. The pre-sampling stage prepares the signal in advance, allowing the main operational amplifier to operate at lower gain and speed while still achieving accurate conversion, thus reducing power consumption without sacrificing conversion performance
2Measurement precision
If typical pipelined ADCs are used, then conversion accuracy is improved, but susceptibility to component mismatch and circuit imperfections increases, requiring background calibration
Solution Approach 1:
The patent performs preliminary calibration actions during the pre-sampling phase where capacitor arrays are selectively connected to reference voltages. This preliminary setup compensates for component mismatches before the actual conversion, eliminating the need for continuous background calibration while maintaining high conversion accuracy
Solution Approach 2:
The patent introduces pre-sampling capacitor circuits as intermediary elements between the input signal and the main conversion stage. These intermediary capacitors serve as buffer elements that isolate the main operational amplifier from direct exposure to input signal variations and component mismatches, reducing sensitivity to imperfections without requiring complex calibration
3Measurement precision
If pre-sampling capacitor circuit is connected to operational amplifier input port during sampling cycle, then signal accuracy is improved, but power consumption increases
Solution Approach 1:
The patent implements periodic action by switching the pre-sampling capacitor circuit connection status between sampling and conversion cycles. During sampling cycles, the capacitors are connected to capture the input signal with high accuracy. During conversion cycles, the connection is switched off to reduce power consumption. This periodic switching allows the system to achieve high signal accuracy only when needed while minimizing power consumption during other operational phases
Data Source
AI summary
A multiplying digital-to-analog converter (MDAC) includes an operational amplifier, a sampling capacitor circuit, a pre-sampling capacitor circuit, and a switch circuit. During a sampling cycle, the switch circuit connects a pre-defined voltage and reference voltages to the pre-sampling capacitor circuit, disconnects the pre-sampling capacitor circuit from an input port of the operational amplifier and the sampling capacitor circuit, disconnects an output port of the operational amplifier from the sampling capacitor circuit, and connects a voltage input to the sampling capacitor circuit. During a conversion cycle, the switch circuit connects the pre-sampling capacitor circuit to the sampling capacitor circuit, disconnects the pre-defined voltage and the reference voltages from the pre-sampling capacitor circuit, connects the pre-sampling capacitor circuit to the input port of the operational amplifier, connects the output port of the operational amplifier to the sampling capacitor circuit, and disconnects the voltage input from the sampling capacitor circuit.