MDAC Capacitor Switching for Impedance-Balanced High-Speed ADCs

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional pipelined analog-to-digital converters (ADCs) face challenges at high speeds due to delays in digital logic, which increase bandwidth requirements and power consumption, particularly in the settling time of reference voltages and the need for additional buffers and thermometric-to-binary converters.

Innovation Solution

A multiplying digital-to-analog converter (MDAC) design that uses a fixed number of capacitors with equal capacitance, directly receiving and applying either the non-inverting or inverting signals from a flash ADC, eliminating the need for thermometric-to-binary conversion and reducing the settling time requirement for reference voltages, thereby simplifying the architecture and reducing power consumption.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If conventional digital logic is used for thermometric code conversion, then the ADC can operate at lower speeds, but the digital logic delay increases and consumes major portion of settling time

Engineering Contradiction:
Improveoperating speedVSAvoidsettling time
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent extracts and eliminates the thermometric-to-binary code conversion stage from the MDAC architecture. By directly using the thermometric code output from the flash ADC to control the capacitor switching, the design removes the digital logic conversion stage that was causing time delays, thereby reducing the settling time requirement and enabling higher operating speeds.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a simplified switching mechanism that directly maps thermometric code bits to capacitor connections without requiring full binary conversion. This intermediary switching stage allows the thermometric code to directly control the MDAC operation, eliminating the need for complex digital logic while maintaining proper signal conversion.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Device complexity

If conventional MDAC architecture with varying capacitance is used, then the reference voltage can be simplified, but the reference voltage requires full accuracy settling which increases bandwidth requirement

Engineering Contradiction:
Improvearchitecture complexityVSAvoidreference voltage accuracy
Core Design Contradiction:
Device complexityVSMeasurement precision

Solution Approach 1:

The patent employs dynamic capacitor switching where the same set of capacitors are reconfigured in different configurations based on the thermometric code input. Instead of having fixed varying capacitance values, the system dynamically connects capacitors to different nodes (virtual ground, reference voltage, or input signal) based on the digital code, maintaining constant total capacitance while achieving the required multiplication function.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the connection parameters of the capacitors rather than changing their capacitance values. The same capacitors are switched to connect to different voltage nodes based on the thermometric code, thereby changing the effective voltage reference applied to each capacitor while maintaining constant physical capacitance, which reduces the bandwidth requirement for reference voltage settling.

Inventive Principle:
Principle #35Parameter changes

3Adaptability or versatility

If extra buffers are added to drive capacitors when X=0, then the MDAC can handle all digital values, but the power consumption and device complexity increase

Engineering Contradiction:
Improvedigital value handling capabilityVSAvoidpower consumption
Core Design Contradiction:
Adaptability or versatilityVSUse of energy by moving object

Solution Approach 1:

The patent makes the same set of capacitors serve multiple functions by dynamically reconfiguring their connections. The capacitors can be connected to virtual ground, reference voltage, or input signal nodes depending on the thermometric code, eliminating the need for separate buffer circuits for different digital value cases. This multi-functional approach reduces both power consumption and device complexity while maintaining full digital value handling capability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the functionality of multiple separate capacitor sets and buffer circuits into a single unified capacitor array with dynamic switching. Instead of having separate capacitors for different digital value ranges with dedicated buffers, the system combines all functionality into one reconfigurable capacitor network controlled directly by the thermometric code, reducing overall power consumption and complexity.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS8581769B2Multiplying digital-to-analog converter configured to maintain impedance balancing
Publication Date: 2013.11.12 STMICROELECTRONICS INT NV
  • US8581769B2 patent drawing
  • US8581769B2 patent drawing
  • US8581769B2 patent drawing

AI summary

A multiplying digital-to-analog converter suited to maintain impedance balancing during phases. In an embodiment, an input signal may be sampled onto nodes of impedance elements during an initial phase. In a second phase the impedance elements are directly coupled either to a non-inverting reference input or the inverting reference input of an amplifier depending on an output of a related flash ADC output. The determination as to which capacitor is to be coupled to inverting or non-inverting input nodes may be directly programmed into the MDAC using switches, such that a thermometric to binary converter is not required in an example embodiment. Thus, the number of impedance elements coupled to the non-inverting reference input or inverting reference input REFM remains constant in each cycle such that there is no need to settle the non-inverting reference input or inverting reference input to full accuracy.