Meandering Transistor Gate for EOS and ESD Protection
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Solution Overview
Problem
Conventional transistors are inadequate in protecting semiconductor devices from both electrostatic discharge (ESD) and electrical overstress (EOS) events, as they either fail to efficiently discharge ESD currents or are damaged by EOS due to parasitic bipolar operations, especially in large bipolar insulated-gate field-effect transistors (BIGFETs).
Innovation Solution
A transistor with EOS protection is designed, featuring a meandering conduction pattern between impurity regions, a silicide blocking layer, and a stress detection circuit that activates a clamping signal to discharge ESD or EOS events effectively, with the conduction pattern's resistance increasing from the center to the ends, ensuring sufficient on-time for charge discharge without additional circuit space.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate on-time is increased to prevent BIGFET damage, then EOS protection is improved, but additional circuit space is required
Solution Approach 1:
The protection functions for both ESD and EOS are merged into a single transistor structure with multiple gates. The control circuit integrates stress detection and gate voltage adjustment functions, eliminating the need for separate protection circuits and reducing overall circuit space while maintaining comprehensive protection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively increases the on-time of the clamp device, ensuring thorough discharge of EOS events and preventing damage to the transistor's center portion, thereby enhancing the protection of internal core circuits from both ESD and EOS without increasing circuit size.
Implementation Method 1
the conduction pattern's resistance increasing from the center to the ends
Implementation Method 2
Electrostatic discharge (ESD) is a phenomenon where a finite quantity of electrostatic charge may be rapidly transferred between bodies or surfaces at different electrostatic potentials
Data Source
AI summary
A transistor with an electrical overstress (EOS) protection may include an active region, a plurality of impurity regions and a conduction pattern. The active region may be formed in a substrate. The impurity regions may be formed in the active region and arranged at a predetermined or given distance with respect to each other. The conduction pattern may be arranged between each of the impurity regions in a meandering shape, and the conduction pattern may include a center portion connected to a ground terminal. Therefore, a transistor with EOS protection, a clamp device, and an ESD protection circuit including the same may increase an on-time of a clamp device and may sufficiently discharge a charge due to the EOS by including a conduction pattern configured with gates that are connected with respect to each other in a meandering shape.