Automatic Measuring Processor for Secure Boot Code Verification

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current boot processes in processors lack the capability to measure primary and secondary boot code prior to execution, making them vulnerable to malicious alterations, which can go undetected and compromise system security.

Innovation Solution

An automatic measuring processor is introduced, coupled to both the system processor and a storage device via separate buses, capable of generating hash values based on boot code during the boot process, allowing for pre-execution verification and initialization of Trusted Platform Module (TPM) operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the processor performs boot-up operations to initialize itself and components, then the processor becomes operational and can execute code, but the processor cannot measure the boot code before execution because it is not sufficiently initialized yet

Engineering Contradiction:
ImprovesecurityVSAvoidboot process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces a separate measuring processor that performs measurements of boot code before the main processor executes it. This preliminary measurement action allows the system to verify the integrity of boot code (primary and secondary boot loaders) before the main processor becomes fully operational, thereby resolving the contradiction by enabling security verification without requiring the main processor to be fully initialized first.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces a measuring processor as an intermediary component between the storage device containing boot code and the main processor. This intermediary measuring processor reads and measures the boot code independently, generating hash values that are later used by the main processor for verification. This intermediary approach allows measurement capability to exist without adding complexity to the main processor's boot initialization sequence.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If a separate measuring processor is introduced to measure boot code before execution, then security is enhanced by enabling pre-execution verification, but device complexity increases

Engineering Contradiction:
ImprovesecurityVSAvoidprocessor architecture complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the processing functions by separating the measuring processor from the main processor. The measuring processor is dedicated solely to reading and measuring boot code, while the main processor focuses on executing the measured code. This segmentation allows the measuring processor to be a simple, specialized component that adds minimal complexity while providing essential security verification functionality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The measuring processor creates a copy of the boot code from storage for measurement purposes, without requiring the main processor to duplicate measurement functionality. This copying approach allows the measuring processor to work with its own copy of the boot code independently, simplifying the architecture by avoiding the need for the main processor to have dual measurement and execution capabilities.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS9740866B2Automatic measuring boot process using an automatic measuring processor coupled to a memory
Publication Date: 2017.08.22 THE BOEING CO
  • US9740866B2 patent drawing
  • US9740866B2 patent drawing
  • US9740866B2 patent drawing

AI summary

An apparatus includes a first interface configured to be coupled to a storage device via a first bus. The apparatus includes a second interface configured to be coupled to a system processor (e.g., a central processing unit (CPU), a graphics processing unit (GPU), a digital signal processor (DSP), etc.) via a second bus. The apparatus further includes a processor configured to, during a boot process of the system processor, receive boot code from the storage device via the first interface. The processor is configured to generate a first value based on the boot code. The processor is further configured to provide the boot code to the system processor via the second interface.