Media Controller End-to-End Data Protection for Far Memory
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Solution Overview
Problem
Traditional data transfer protocols in multilevel memory systems lack end-to-end data protection, leading to high error rates and inefficiencies in writing data to nonvolatile memory devices, as they cannot verify successful writes beyond the protocol layers, resulting in potential data corruption or incomplete writes.
Innovation Solution
Implementing a message-based system with write credits and commit indicators to ensure end-to-end flow control and error protection, where the media controller sends a transaction message to the host indicating successful writes or errors, allowing the host to manage pending writes and handle errors promptly.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional PCIe acknowledgment mechanism is used, then connection reliability is ensured, but end-to-end data protection is lost and error rates increase
Solution Approach 1:
The patent implements a feedback mechanism where the media controller sends commit messages back to the host controller to confirm successful data commits. This feedback loop provides end-to-end acknowledgment, allowing the host to verify that data was successfully written to nonvolatile memory, thereby preventing data corruption and ensuring reliability.
Solution Approach 2:
The patent introduces commit indicators and transaction messages as intermediaries between the host controller and media controller. These intermediaries carry commitment information across the PCIe interface, enabling the host to track the status of data writes without directly accessing the media, thus providing end-to-end protection while maintaining system architecture.
2Productivity
If host requests more writes than memory device capability, then productivity increases, but error handling complexity increases
Solution Approach 1:
The patent implements preliminary action by having the media controller proactively send commit messages to the host controller after successfully committing data. This allows the host to advance write requests without waiting for confirmation, improving throughput while the systematic error handling reduces complexity by providing clear status information.
Solution Approach 2:
The feedback mechanism provides structured error information through commit messages, allowing the host controller to efficiently manage error conditions. By receiving explicit commitment status, the host can implement simple retry logic or error reporting without complex error handling, thus maintaining high productivity while reducing handling complexity.
3Reliability
If traditional acknowledgment mechanism is used, then connection reliability is ensured, but data commit verification beyond protocol layers is lost
Solution Approach 1:
The patent uses commit indicators embedded in transaction messages as intermediaries to carry data commit verification information across the PCIe interface. These intermediaries bridge the gap between protocol-layer acknowledgment and physical media commit status, enabling end-to-end verification without losing write status information.
Solution Approach 2:
The media controller provides feedback through commit messages that explicitly indicate whether data was successfully committed to nonvolatile memory. This feedback gives the host controller direct visibility into actual media write status, ensuring reliable data commit verification while preserving complete write status information.
4Device complexity
If redundant link flow control is eliminated, then device complexity reduces, but data integrity protection may be compromised
Solution Approach 1:
The patent extracts the essential flow control function from redundant link-level mechanisms and implements it at the application layer through commit indicators and transaction messages. This eliminates unnecessary redundancy while preserving data integrity protection by maintaining targeted flow control where it is most needed for end-to-end verification.
Data Source
AI summary
A multilevel memory system includes a nonvolatile memory (NVM) device with an NVM media having a media write unit that is different in size than a host write unit of a host controller of the system that has the multilevel memory system. The memory device includes a media controller that controls writes to the NVM media. The host controller sends a write transaction to the media controller. The write transaction can include the write data in host write units, while the media controller will commit data in media write units to the NVM media. The media controller can send a transaction message to indicate whether the write data for the write transaction was successfully committed to the NVM media.