Melting Gate Electrode for High Carrier Concentration
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Solution Overview
Problem
The challenge in microelectronic device fabrication is to produce thin gate layers with a large supply of charge while avoiding the limitations of polysilicon gates, such as depletion-induced performance deterioration and integration issues with metal gates, particularly in scaling down transistor sizes.
Innovation Solution
The method involves implanting dopants into a gate electrode with a melting point below the substrate, melting, and re-solidifying it to increase dopant-occupied substitutional sites, thereby enhancing the concentration of majority carriers and reducing depletion effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If doped polysilicon is used as gate material, then the gate can be manufactured with existing processes, but the gate becomes depleted of majority carriers causing increased electrical thickness and deteriorated transistor performance
Solution Approach 1:
The patent changes the physical state of the gate material by melting and rapidly resolidifying it. This phase transition fundamentally alters the material properties, transforming polysilicon into a metal-like state with dramatically increased carrier concentration, thereby resolving the depletion problem while maintaining manufacturability
Solution Approach 2:
The patent creates a composite structure by combining polysilicon with heavy metal atoms (such as tungsten, molybdenum, or platinum) during the melting process. This composite approach provides both the manufacturability of polysilicon and the high carrier concentration of metals, eliminating the performance deterioration issue
2Reliability
If metal gates are used to provide large supply of charge, then there is no substantial electric field penetration at the interface, but it is challenging to deposit and etch metals selectively without damaging underlying structures
Solution Approach 1:
The patent uses polysilicon as an intermediary material that can be selectively melted and transformed. This intermediary approach allows the use of standard polysilicon deposition and etching processes while achieving metal-like electrical properties, thereby reducing fabrication complexity compared to direct metal gate implementation
Solution Approach 2:
The patent exploits the phase transition of polysilicon from solid to liquid and back to solid through controlled melting and rapid resolidification. This phase transition enables the material to absorb dopants uniformly and transform into a high-carrier-concentration state, providing metal-like charge supply capability while maintaining compatibility with existing fabrication processes
3Length of moving object
If gate thickness is decreased to scale down transistors, then higher electric field can be achieved for a given gate voltage, but depletion effects are exacerbated and electrical thickness increases relative to physical thickness
Solution Approach 1:
The patent fundamentally changes the electrical parameters of the gate material through melting and resolidification, increasing carrier concentration by several orders of magnitude. This parameter change ensures that even as gate thickness decreases, the gate maintains sufficient charge supply to prevent depletion effects and maintain performance
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a gate with significantly more dopant-occupied substitutional sites, improving transistor performance by maintaining a strong electric field and reducing the effective thickness of the gate dielectric, leading to increased drive current and switching speed.
Implementation Method 1
melting the gate electrode to allow the dopant to diffuse throughout the gate electrode
Implementation Method 2
re-solidifying the gate electrode, to increase dopant occupied substitutional sites within the gate electrode
Implementation Method 3
melting the gate electrode to allow the dopant to diffuse throughout the gate electrode
Data Source
AI summary
The present invention provides, in one embodiment, a method for fabricating a microelectronic device. The method comprises implanting a dopant into a gate electrode located on a substrate. The gate electrode has a melting point below a melting point of the substrate. The method also comprises melting the gate electrode to allow the dopant to diffuse throughout the gate electrode. The method further comprises re-solidifying the gate electrode to increase dopant-occupied substitutional sites within the gate electrode.


