Membrane Semiconductor Structure for Dicing-Free Singulation

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Solution Overview

Problem

The high cost and inefficiency of singulating membrane semiconductor components using traditional dicing methods, which result in significant wafer area loss and increased costs, especially for larger wafer diameters, and the issue of backside chipping during the dicing process.

Innovation Solution

The introduction of a second backside cavity in the outer region of the membrane semiconductor component, allowing for dicing-free singulation processes through lateral expansion or pressurization, reducing the thickness to be cut and enabling narrower dicing lines, thus minimizing wafer area loss and avoiding backside chipping.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional dicing methods are used for singulating membrane semiconductor components, then the components can be separated into individual chips, but significant wafer area is lost and costs increase

Engineering Contradiction:
Improvesingulation efficiencyVSAvoidwafer area loss
Core Design Contradiction:
ProductivityVSLoss of substance

Solution Approach 1:

The patent introduces a second backside cavity in the outer region of the membrane semiconductor component, dividing the substrate structure into distinct functional regions. This segmentation allows for optimized dicing line placement that minimizes wafer area loss during singulation while maintaining component integrity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent utilizes the vertical dimension by creating backside cavities at different locations (first backside cavity under the active region, second backside cavity in the outer region). This three-dimensional structural approach enables more efficient singulation paths that reduce lateral wafer area loss compared to traditional planar dicing methods.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If traditional dicing methods are used, then singulation can be performed, but the process time increases and costs increase for larger wafer diameters

Engineering Contradiction:
Improvesingulation speedVSAvoidprocess time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent prepares the substrate structure in advance by forming backside cavities in specific regions before the singulation process. This preliminary structural preparation enables faster and more efficient dicing operations, reducing the actual singulation time required for large diameter wafers.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies different structural characteristics to different regions of the substrate - the first backside cavity under the active region provides mechanical support and defines the cutting path, while the second backside cavity in the outer region optimizes the dicing line geometry. This localized structural optimization reduces overall process time.

Inventive Principle:
Principle #3Local quality

3Productivity

If traditional dicing methods are used, then chips can be separated, but backside chipping occurs during the dicing process

Engineering Contradiction:
Improvesingulation capabilityVSAvoidchip integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent positions the first backside cavity under the active region to provide structural cushioning and support during the dicing process. This pre-positioned structural feature prevents backside chipping by distributing mechanical stresses away from the fragile active region during chip separation.

Inventive Principle:
Principle #11Beforehand cushioning (Prior cushioning)

Solution Approach 2:

The backside cavities act as intermediary structural features that mediate between the dicing blade and the active region. The first backside cavity serves as a stress distribution zone that protects the active region from chipping, while the second backside cavity in the outer region provides additional structural guidance for clean separation.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS20240243170A1Membrane semiconductor component and method for producing the same
Publication Date: 2024.07.18 ROBERT BOSCH GMBH
  • US20240243170A1 patent drawing
  • US20240243170A1 patent drawing
  • US20240243170A1 patent drawing

AI summary

A membrane semiconductor component which has an outer region and a membrane region. At least part of a substrate is disposed in the outer region. The substrate is structured such that a backside cavity is configured in the membrane region. The backside cavity is free of substrate. At least one active region is disposed in the membrane region, and the active region comprises at least one pn transition. At least one target contact point for membrane semiconductor component-external contacting is disposed on or above the substrate in the outer region. The target contact point has an electrically conductive structure, which is coupled to the active region.