Memcomputing System with Memristive Crossbar for Energy Efficiency

The patent merges memory and computation functions into a single integrated structure by embedding processing units directly within the memory array. Each memory cell is associated with compute elements that can perform arithmetic operations locally, eliminating the need for separate memory and CPU components and reducing energy consumption from data transfer.

The patent transitions from the traditional von Neumann architecture's sequential processing model to a parallel processing dimension by enabling simultaneous computations across multiple memory cells. The crossbar architecture allows multiple data paths to operate concurrently, fundamentally changing the computational paradigm from serial to parallel execution.

The patent implements dynamic voltage and frequency scaling at the memory cell level, allowing each compute element to operate at optimized frequencies based on computational requirements. This dynamic adjustment enables the system to maintain high computation speeds when needed while reducing energy consumption during less intensive operations.

The patent divides the computational system into independent, finely-grained processing units distributed across the memory array. Each unit can operate autonomously at its own optimal frequency, allowing the system to scale computation speed by activating more segments rather than increasing the frequency of individual units, thus maintaining energy efficiency.

The patent creates a universal computational fabric where memory cells serve dual purposes: storing data and performing computations. This multi-functionality eliminates the need for separate processing cores, as the same memory structure can execute various computational tasks directly, increasing productivity without proportionally increasing energy consumption.

The patent enables memory cells to perform computations on data already present in their local state, eliminating the need to transfer data to separate processing units. This self-service capability allows the memory structure to handle computational tasks autonomously, increasing overall system productivity while minimizing energy expenditure on data movement and inter-core communication.