Memory Abort Register Emulation for Virtualization
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Solution Overview
Problem
Existing virtualization techniques face inefficiencies in emulating memory access operations for virtual devices, requiring slow and complex decoding of instructions to identify registers and translate virtual addresses, which hampers processing speed.
Innovation Solution
The method involves using detection circuitry to trigger a memory-abort exception and writing memory-abort data to a register, including register information, to enable direct emulation of memory access operations without decoding the original instruction, thereby improving processing efficiency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If instruction decoding is performed to identify registers for memory access emulation, then emulation accuracy is improved, but processing speed deteriorates
Solution Approach 1:
The memory management unit performs preliminary action by automatically capturing and storing register information when a memory access exception occurs, before the emulation process begins. This preliminary capture of register data eliminates the need for subsequent instruction decoding to identify registers, thereby resolving the contradiction between accuracy and speed.
Solution Approach 2:
The memory-abort register acts as an intermediary mechanism between the memory management unit and the emulation handler. It stores the captured register information in a dedicated location, allowing the emulation process to access this pre-prepared data without performing instruction decoding, thus improving speed while maintaining accuracy.
2Adaptability or versatility
If virtual address translation is performed to locate instructions, then address space management is improved, but processing time increases
Solution Approach 1:
The invention extracts only the necessary register information from the complex address translation and instruction location process. By having the memory management unit directly capture register data upon exception occurrence, the system separates this essential information extraction from the time-consuming full address translation and instruction decoding processes.
Solution Approach 2:
The memory management unit performs preliminary capture of register information at the moment of memory access exception, before the full address translation and instruction location process completes. This preliminary action ensures that the critical register data is already available for emulation without waiting for complete address space traversal.
Data Source
AI summary
A data processing apparatus 12 is provided with a memory management unit 24 which triggers memory aborts. When a memory abort occurs, data characterizing the memory abort is written to a fault status register 28 (memory-abort register). The data characterizing the memory abort includes data identifying a register number associated with the memory access which gave rise to the memory abort. This register identifying data is used to emulate the action of the memory access instruction without having to read the program instruction lead to the memory abort. This is useful in providing virtualization support for a virtual data processing apparatus 2.