Memory Access Arbitration for Page Switch Reduction

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Solution Overview

Problem

Conventional memory access request prioritization schemes in processing systems lead to significant delays due to frequent page switching in page-based memories like DRAM, especially in dual data rate (DDR) memories, resulting in 'thrashing' and cumulative delays.

Innovation Solution

Implementing a persistent page memory access request arbitration technique that preferentially selects memory access requests expected to access the same page as the previous request, using a multiple round robin selection scheme and buffering requests until a predetermined number or data threshold is met, to reduce page switches and delay.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If fixed prioritization scheme is used for memory access requests, then request processing order is determined, but page switching frequency increases causing thrashing and cumulative delays

Engineering Contradiction:
Improverequest processingVSAvoidmemory access delay
Core Design Contradiction:
Ease of operationVSLoss of time

Solution Approach 1:

The patent implements dynamic arbitration that adapts to memory access patterns by tracking page hit/miss status and adjusting request selection accordingly. Instead of static fixed priorities, the system dynamically modifies arbitration behavior based on real-time memory state, reducing page switches and thrashing while maintaining efficient request processing

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system incorporates feedback mechanisms by monitoring memory access outcomes (page hits vs. misses) and using this information to influence subsequent arbitration decisions. The arbitration logic receives feedback about page validity status and uses it to preferentially select requests that will result in page hits, thereby reducing the frequency of costly page switches and associated delays

Inventive Principle:
Principle #23Feedback

2Adaptability or versatility

If frequent page switching occurs in fixed prioritization, then different memory pages can be accessed, but cumulative delay increases due to page close/open overhead

Engineering Contradiction:
Improvememory page accessVSAvoidpage switch delay
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent applies preliminary action by pre-fetching or pre-positioning memory pages that are likely to be needed based on access patterns. The system anticipates future memory access requirements and prepares the appropriate pages in advance, reducing the frequency of urgent page switches and the associated close/open overhead that causes cumulative delays

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system maintains continuity of useful action by keeping memory pages open and active for extended periods when possible, based on predicted access patterns. Instead of allowing pages to be closed and reopened frequently, the arbitration logic continues to service requests from currently open pages, maintaining continuous productive memory access operations and minimizing disruptive page switch cycles

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS7426621B2Memory access request arbitration
Publication Date: 2008.09.16 MEDIATEK INC
  • US7426621B2 patent drawing
  • US7426621B2 patent drawing
  • US7426621B2 patent drawing

AI summary

A method includes receiving a first memory access request from a first device during a first interval. The first memory access request is to access a first page of a multiple-page memory. The method further includes receiving a second memory access request from the first device during a second interval subsequent to the first interval and receiving a third memory access request from a second device during the second interval. The method additionally includes preferentially selecting the second memory access request over the third memory access request for provision to the multiple-page memory if an indicator indicates the second memory access request is expected to access the first page of the multiple-page memory.