Memory Access Blocking Circuit for Invalid Read Security
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Solution Overview
Problem
Semiconductor apparatuses face security issues due to meaningless data output and potential vulnerabilities from invalid accesses, particularly when a host attempts to access non-existent memory regions, leading to column operations and data output that can compromise system security.
Innovation Solution
The semiconductor apparatus includes a flag signal generation circuit that detects invalid accesses based on row address signals and generates an invalid access flag signal, coupled with a column decoder to block data output through logic operations, ensuring data is not transmitted during invalid accesses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the semiconductor apparatus performs column operation and outputs data in response to invalid access, then the data output operation is completed, but security problems arise and meaningless data is output
Solution Approach 1:
The flag signal generation circuit performs preliminary detection of invalid accesses by examining the row address signal before the data output operation occurs. When an invalid access is detected, the circuit generates an invalid access flag signal that prevents the column decoder from generating column selection signals, thereby blocking data output before it can cause security problems.
2Ease of operation
If the semiconductor apparatus outputs data in response to read command, then data transmission is enabled, but meaningless data is output during invalid access causing security vulnerabilities
Solution Approach 1:
The flag signal generation circuit acts as an intermediary between the row address signal and the column decoder. It detects invalid accesses by examining the row address signal and generates an invalid access flag signal that mediates the data output process. This intermediary mechanism allows normal data transmission to continue while blocking only the harmful data output during invalid accesses.
3Productivity
If the semiconductor apparatus allows data output during invalid access, then the read operation is completed, but unnecessary current consumption occurs
Solution Approach 1:
The flag signal generation circuit performs preliminary detection of invalid accesses before the data output operation occurs. By detecting the invalid access condition in advance and generating an invalid access flag signal, the circuit prevents the column decoder from generating column selection signals that would drive data output and cause unnecessary current consumption.
Data Source
AI summary
A semiconductor apparatus comprises a memory region, generates an invalid access flag signal indicating an invalid access to the memory region based on a row address signal input with a read command, and blocks data output in response to the invalid access flag signal.