Semiconductor Memory Access Control Circuitry for Reducing Read Disturbs

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Solution Overview

Problem

Semiconductor memory devices face instability and access disturbs due to high capacitance on the power node of the wordline driver, leading to uncontrolled voltage rises and increased read disturb issues, especially in memories with a large number of rows and few columns.

Innovation Solution

The implementation of access control circuitry that includes a capacitor connected to the voltage supply line to reduce the voltage level, along with pull down switching circuitry and high impedance connections, to control the voltage level on the word line, thereby delaying the activation of access devices and reducing access disturbs.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the word line voltage rises quickly due to high capacitance on the power node, then the access devices are turned on quickly, but this causes read disturb and instability in the bit cell

Engineering Contradiction:
Improveword line voltage rise speedVSAvoidbit cell stability
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-charging the bit lines before activating the word line. This ensures that when the word line voltage rises quickly and turns on access devices, the bit lines are already in a stable precharged state, preventing read disturb and bit cell instability. The precharge phase prepares the system in advance to handle the rapid voltage transition.

Inventive Principle:
Principle #10Preliminary action

2Speed

If the capacitance of the power node of the wordline driver is high, then the wordline voltage rises quickly, but it becomes difficult to control the voltage transferred to the word line

Engineering Contradiction:
Improvewordline voltage rise speedVSAvoidvoltage control difficulty
Core Design Contradiction:
SpeedVSEase of operation

Solution Approach 1:

The patent introduces an intermediary mechanism through the precharge circuitry that mediates between the high-capacitance power node and the word line. The precharge circuitry controls the timing and level of voltage transfer, acting as a buffer that allows rapid voltage rise while maintaining controllability. This intermediary stage decouples the direct relationship between power node capacitance and word line voltage control.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Quantity of substance

If memories have a large number of rows and few columns, then the capacitance on the power node of the wordline driver increases, but the wordline is smaller and voltages rise more quickly

Engineering Contradiction:
Improvenumber of rowsVSAvoidvoltage rise speed
Core Design Contradiction:
Quantity of substanceVSSpeed

Solution Approach 1:

The patent applies segmentation by dividing the memory into multiple rows with word line drivers, where each driver manages a specific row. This segmentation allows the high total capacitance to be distributed across multiple smaller capacitance loads (individual row word lines), enabling better voltage control while maintaining fast rise times. Each segmented driver can be independently controlled to charge its associated word line appropriately.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution effectively reduces access disturbs by controlling the voltage level on the word line, minimizing the risk of bit cell flipping during read and write operations, while maintaining sufficient charge to prevent voltage drops in high-capacitance word lines.

Implementation Method 1

said access control circuitry comprising: a voltage supply line for supplying voltage to said access control lines; at least one capacitor; voltage control switching circuitry for connecting said at least one capacitor to said voltage supply line

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS8611172B2Controlling a voltage level of an access signal to reduce access disturbs in semiconductor memories
Publication Date: 2013.12.17 ARM LTD
  • US8611172B2 patent drawing
  • US8611172B2 patent drawing
  • US8611172B2 patent drawing

AI summary

A semiconductor memory storage device having a plurality of storage cells for storing data, each storage cell comprising an access control device and access control circuitry. The access control circuitry is configured to respond to a data access request signal to access a selected storage cell connected to a corresponding selected access control line to: control the voltage control switching circuitry to connect the at least one capacitor to the voltage supply line such that the at least one capacitor is charged by the voltage supply line and a voltage level on the voltage supply line is reduced; and to control the access control line switching circuitry to connect the selected access control line to the voltage supply line having the reduced voltage level.