Memory Access Control Circuit for Unauthorized Access Prevention
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Solution Overview
Problem
Existing systems for managing memory access rights by a central processing unit executing different programs are inadequate in preventing unauthorized access to reserved memory areas and lack transparency to the operating system.
Innovation Solution
A method involving a circuit that controls access to a second memory by configuring access control using decrypted program initialization information, instructions, and data, which monitors the address bus to ensure authorized access and operates in specific modes to prevent unauthorized access, while being transparent to the operating system.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a circuit controls access to memory by verifying instructions from a memory area referenced in a table, then unauthorized access to memory areas is prevented, but the device complexity increases due to the interposed circuit and table structure
Solution Approach 1:
An access control circuit is introduced as an intermediary component between the central processing unit and the memory system. This circuit intercepts address bus signals, verifies them against stored reference tables, and controls memory access accordingly. The intermediary circuit provides the necessary security functionality while maintaining compatibility with existing memory architectures.
Solution Approach 2:
Reference tables containing authorized memory area information are pre-configured and stored in the access control circuit before operation. The circuit is programmed with the memory areas that should be accessible, eliminating the need for runtime configuration and enabling rapid verification of access requests without complex decision-making processes.
2Reliability
If an access control circuit monitors the address bus to verify addresses within a range, then memory area protection is enhanced, but the processing time increases due to continuous monitoring and verification
Solution Approach 1:
The access control circuit is pre-configured with reference tables containing the address ranges and memory area definitions during system initialization or manufacturing. This preliminary setup enables the circuit to perform simple, fast comparison operations during runtime rather than executing complex verification algorithms, significantly reducing access verification time.
Solution Approach 2:
The memory address space is divided into distinct segments or regions, each with its own access control rules stored in separate table entries. The access control circuit processes address verification by comparing the requested address against the appropriate segmented range, enabling efficient parallel verification of multiple memory areas simultaneously.
3Reliability
If the access control circuit verifies addresses and operating modes, then unauthorized program execution is prevented, but the ease of operation decreases due to mode restrictions and verification requirements
Solution Approach 1:
The access control circuit automatically performs address verification and mode checking without requiring explicit software commands or user intervention. The circuit continuously monitors the address bus and control signals, autonomously determining whether each memory access is authorized based on the current operating mode and pre-configured rules, thereby maintaining ease of operation while ensuring security.
Solution Approach 2:
The access control circuit is designed to support multiple operating modes (e.g., user mode, supervisor mode, secure mode) and can enforce different access rules for each mode. This multi-functional capability allows a single circuit to handle diverse security requirements across different program execution contexts without requiring separate control mechanisms for each mode.
4Reliability
If cyphered programs are loaded from a third memory into the execution memory, then program security is enhanced, but the loading process complexity increases due to the additional memory and decryption requirements
Solution Approach 1:
A third memory device serves as an intermediary storage medium for cyphered program code. The access control circuit acts as a mediator that manages the decryption and loading process, transferring authenticated and decrypted code from the third memory to the execution memory. This intermediary architecture enables secure program distribution and loading while maintaining a clear separation between storage, security verification, and execution functions.
Data Source
AI summary
A method for loading a program, contained in at least a first memory, into a second memory accessible by an execution unit, in which the program is in a cyphered form in the first memory, a circuit for controlling the access to the second memory is configured from program initialization data, instructions of the program, and at least initialization data being decyphered to be transferred into the second memory after configuration of the circuit.