Memory Access Control for Discontinuous Word Lengths

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Solution Overview

Problem

Existing information processing devices face performance degradation due to mismatched word lengths between operation units and main memory, leading to increased memory access time and inefficient use of connection ports.

Innovation Solution

A memory access control device that generates and distributes access addresses across multiple connection ports with discontinuous word lengths, utilizing a routing address generation unit, conflict arbitration unit, and crossbar unit to optimize access requests and reduce access time.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If continuous words of multiple continuous operation units are assigned to words of main memory, then throughput is improved, but performance degradation occurs when word length of operation unit and word length of main memory differ

Engineering Contradiction:
ImprovethroughputVSAvoidperformance compatibility
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent segments the main memory into multiple banks (first bank and second bank) with different access units. This segmentation allows the system to handle both continuous word access (for throughput) and discontinuous word access (for compatibility), resolving the contradiction between improving throughput and maintaining performance compatibility across different word length configurations.

Inventive Principle:
Principle #1Segmentation

2Speed

If access unit of main memory is increased to match high-speed DDR DRAM, then processing speed is improved, but access performance degrades when operation unit access length differs from memory access unit

Engineering Contradiction:
Improveprocessing speedVSAvoidmemory access time
Core Design Contradiction:
SpeedVSLoss of time

Solution Approach 1:

The patent dynamically adjusts the access unit based on the operation type. For continuous data access operations, it uses a larger access unit (matching DDR DRAM capabilities) to improve processing speed. For operations requiring access to discontinuous words, it dynamically switches to a smaller access unit, preventing access time increases and maintaining optimal performance across different operation scenarios.

Inventive Principle:
Principle #15Dynamics

3Productivity

If continuous words are assigned to connection ports, then access performance is improved, but connection port utilization efficiency decreases when word lengths mismatch

Engineering Contradiction:
Improveaccess performanceVSAvoidconnection port utilization efficiency
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent applies different access strategies to different connection ports based on local requirements. The first connection port handles continuous word access with a first access unit optimized for throughput, while the second connection port handles discontinuous word access with a second access unit optimized for compatibility. This local quality differentiation allows each port to operate at peak efficiency for its specific access pattern, improving overall utilization efficiency.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS8806132B2Information processing device, memory access control device, and address generation method thereof
Publication Date: 2014.08.12 NEC CORP
  • US8806132B2 patent drawing
  • US8806132B2 patent drawing
  • US8806132B2 patent drawing

AI summary

An information processing device according to the present invention includes an operation unit that outputs an access request, a storage unit including a plurality of connection ports and a plurality of memories capable of a simultaneous parallel process that has an access unit of a plurality of word lengths for the connection ports, and a memory access control unit that distributes a plurality access addresses corresponding to the access request received for each processing cycle from the operation unit, and generates an address in a port including a discontinuous word by one access unit for each of the connection ports.