Memory Access Control via Dynamic Mode Switching

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Solution Overview

Problem

Current data processing systems face challenges in securely managing memory access, particularly in constraining access to memory regions while allowing for unconstrained access during memory region management operations, which is essential for maintaining security and preventing accidental or malicious access.

Innovation Solution

A data processing apparatus is configured with processing circuitry that operates in both normal and memory region management modes, utilizing a memory region table for access control in normal mode and a memory protection unit (MPU) to bypass the table's constraints when in management mode, allowing unconstrained access to specific memory regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the memory region table is used to constrain access to memory regions, then security is improved by preventing accidental or malicious access, but the ability to perform memory region management operations is worsened due to unnecessary access constraints

Engineering Contradiction:
ImprovesecurityVSAvoidmemory region management capability
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The access control mechanism dynamically switches between two operational states: in normal mode, it enforces memory region table constraints to ensure security; in management mode, it suspends these constraints to enable memory region management operations. This dynamic adaptation resolves the contradiction by making the access control flexible rather than static, allowing the system to maintain security when needed while enabling management operations when required

Inventive Principle:
Principle #15Dynamics

2Reliability

If the memory region table constrains all memory access, then security is improved, but the device complexity increases due to the need for additional access control mechanisms

Engineering Contradiction:
ImprovesecurityVSAvoidaccess control mechanism complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The access control mechanism applies different access control qualities to different operational contexts: in normal mode, full memory region table constraints are applied to ensure security; in management mode, constraints are selectively suspended for management operations. This local differentiation of access control quality allows security to be maintained where needed without unnecessarily complicating the system architecture

Inventive Principle:
Principle #3Local quality

3Measurement precision

If the memory region table is referenced for every access request, then access control precision is improved, but the processing speed is worsened due to additional lookup operations

Engineering Contradiction:
Improveaccess control precisionVSAvoidmemory access speed
Core Design Contradiction:
Measurement precisionVSSpeed

Solution Approach 1:

The access control mechanism operates periodically in two distinct phases: during normal operation cycles, memory region table lookups are performed to ensure precise access control; during management operation cycles, these lookups are suspended to enable faster access. This periodic alternation between precise control and high-speed operation resolves the contradiction by making access control precision time-dependent rather than constant

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11100010B2Apparatus and method for handling memory access requests
Publication Date: 2021.08.24 ARM LTD
  • US11100010B2 patent drawing
  • US11100010B2 patent drawing
  • US11100010B2 patent drawing

AI summary

An apparatus and method are provided for performing data processing operations. The apparatus has processing circuitry for performing data processing operations configured to operate in a normal mode and a memory region management mode. A memory is used to store data accessed by the processing circuitry when performing the data processing operations. A memory region table is provided to define accessibility control information for each of a number of memory regions within the memory. An access control mechanism controls access to the memory in response to an access request issued by the processing circuitry, and a memory protection unit providing a bypass indication for one or more memory regions is referenced by the access control mechanism when the processing circuitry is in the memory region management mode. The access control mechanism is arranged to constrain access to the memory location identified by the access request based on the accessibility control information defined in the memory region management mode when the processing circuitry is operating in the normal mode. When the processing circuitry is operating in the memory region management mode, the access control mechanism is arranged to reference the memory protection unit and when the bypass indication is set for the memory region, to process the access to the memory location unconstrained by the memory region table.