Memory Subsystem Access Frequency Classification for Wear Leveling

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Solution Overview

Problem

Memory sub-systems face premature wear due to uneven access frequencies of memory cells, leading to reduced lifespan and reliability, especially as storage capacity scales and access patterns change over time.

Innovation Solution

Implementing an identification scheme that classifies access frequencies using multiple counters to track access operations over different durations, enabling accurate wear leveling and data management operations to distribute access evenly across memory cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple counters are used to track access operations over different durations, then measurement precision of access frequency is improved, but device complexity increases

Engineering Contradiction:
Improveaccess frequency classification accuracyVSAvoidcounter management complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The access frequency tracking is segmented into multiple time duration counters (first duration counter and second duration counter), each tracking access operations over different time periods. This segmentation allows the system to capture access patterns at different temporal scales, improving measurement precision while distributing the tracking burden across separate counter structures.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent adds a time dimension to access frequency tracking by maintaining counters for different duration periods. Instead of a single scalar access count, the system now tracks access frequency across multiple time dimensions (short-term and long-term), enabling more nuanced classification of access patterns without requiring a single complex counter mechanism.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If access frequency classification is implemented, then wear leveling performance is improved, but processing overhead increases

Engineering Contradiction:
Improvewear leveling effectivenessVSAvoidprocessing time for access tracking
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary classification of access operations by directing them to appropriate duration counters based on access patterns. By pre-categorizing access operations into different time duration buckets, the system prepares wear leveling decisions in advance, reducing the processing overhead during actual data operations and improving overall wear leveling effectiveness.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements partial tracking by using multiple counters with different duration scopes rather than tracking every single access operation in detail. This partial action approach captures sufficient access frequency information for effective wear leveling while avoiding the excessive processing overhead of comprehensive access logging, achieving a balance between reliability and processing time.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS11650933B2Classifying access frequency of a memory sub-system component
Publication Date: 2023.05.16 MICRON TECHNOLOGY INC
  • US11650933B2 patent drawing
  • US11650933B2 patent drawing
  • US11650933B2 patent drawing

AI summary

A system detects a request for an access operation relating to an address of a component of a memory sub-system, determines a number of access operations pertaining to the particular address using at least one of a plurality of counters. The plurality of counters comprises an extended counter corresponding to an extended period of time and a recent counter corresponding to a recent period of time. The system assigns an access frequency classification to at least one of the address or the component of the memory sub-system based on the number of access operations pertaining to the particular address.