Memory Access Line Hold for Consecutive Read Latency
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Solution Overview
Problem
Consecutive read operations in memory systems are hindered by latency due to the recovery phase required after each read operation, which involves discharging and re-activating access lines, leading to increased processing time and inefficiency.
Innovation Solution
The memory system skips the recovery phase between sequential read operations by keeping access lines activated, allowing subsequent read operations to be performed without re-activation, thereby reducing latency.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the recovery phase is performed between read operations to discharge and re-activate access lines, then the memory system maintains proper electrical state and reliability, but the processing time increases and efficiency decreases
Solution Approach 1:
The patent extracts the recovery phase operation from the standard read operation sequence. By identifying that the recovery phase (discharging access lines) is only necessary after certain types of operations, the patent removes this step from consecutive read operations where it is not needed, thereby reducing latency while maintaining reliability when actually required
Solution Approach 2:
The patent dynamically adjusts the memory operation sequence based on the type of operation being performed. The system determines whether to include the recovery phase based on the specific read operation context, making the operation sequence flexible rather than fixed, which optimizes performance for consecutive reads while maintaining reliability for operations that require it
2Reliability
If the access lines are discharged and re-activated between read operations, then the memory system ensures proper electrical recovery, but the processing speed decreases
Solution Approach 1:
The patent removes the discharge and re-activation steps from the read operation sequence when performing consecutive reads on the same block. By extracting these unnecessary electrical recovery steps, the system achieves faster read speeds while maintaining electrical stability through selective application of recovery only when needed
Solution Approach 2:
The patent enables continuous read operations by keeping access lines activated throughout the sequence. By eliminating the discharge and re-activation cycles between consecutive reads, the system maintains continuous useful action (data retrieval) without interruption, thereby increasing read speed while ensuring electrical stability through controlled recovery phases
Data Source
AI summary
Methods, systems, and devices for improved efficiency for consecutive read operations are described. For example, a memory system may receive a first command indicating a first read operation in a block of memory cells that are each configured to store more than one bit. In response to receiving the first command, the memory system may initiate the performance of the first read operation by applying a voltage to a set of access lines associated with the block of memory cells. The memory system may additionally receive a second read command indicating a second, consecutive read operation in the block of memory cells, where the second command includes an indication to refrain from discharging the set of access lines. Here, the memory system may initiate the performance of the second read operation without first discharging the set of access lines after the performance of the first read operation.