Memory Access Line Remapping for Defect-Tolerant Address Mapping
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Solution Overview
Problem
Existing memory devices face issues with non-uniform electrical characteristics in memory cells due to factors like statistical process variations and defects, leading to errors in reading and writing operations, particularly when using predefined redundant access lines that cause significant changes in electrical distance.
Innovation Solution
Implementing a physical redundancy mechanism that dynamically re-maps addressing by using immediately neighboring access lines to replace defective lines, minimizing changes in electrical distance and maintaining consistent electrical characteristics across memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If predefined redundant access lines are used to replace defective lines, then reliability is improved, but electrical distance changes significantly causing non-uniform electrical characteristics
Solution Approach 1:
The patent implements dynamic address remapping where the controller dynamically adjusts the mapping between logical addresses and physical access lines based on defective line detection. When a defective line is detected, the controller remaps addresses to use alternative lines, making the system adaptable to defects rather than static. This dynamic approach maintains reliable operation while preserving uniform electrical characteristics by selecting replacement lines with similar electrical properties.
Solution Approach 2:
The patent changes the addressing parameters dynamically by remapping logical addresses to different physical access line addresses. Instead of using fixed predefined redundant lines, the system modifies the address mapping parameters to point to alternative lines that maintain similar electrical characteristics. This parameter change enables the system to compensate for defective lines while preserving electrical uniformity across the memory array.
2Device complexity
If predefined redundant access lines are used, then device complexity is reduced, but electrical mismatches increase due to significant changes in electrical distance
Solution Approach 1:
The patent incorporates feedback mechanisms where the controller detects defective access lines and uses this feedback information to remap addresses dynamically. The system continuously monitors the electrical characteristics and defect status, adjusting the address mapping in response to feedback about defective lines. This feedback loop enables the system to maintain uniform electrical characteristics while operating with simplified redundancy mechanisms.
3Manufacturing precision
If immediate neighboring access lines are used to replace defective lines, then electrical distance changes are minimized, but address remapping complexity increases
Solution Approach 1:
The patent performs preliminary actions by pre-identifying and mapping alternative access lines during system initialization or defect detection phases. The controller pre-establishes remapping tables or lookup structures that define which alternative lines should be used for specific defective lines. This preliminary preparation simplifies the actual remapping operation during data access, reducing the computational complexity while maintaining uniform electrical characteristics.
Data Source
AI summary
Systems, methods, and apparatus for a memory device. In one approach, defective access lines in a memory array are identified during an access phase using a stored list. Physical addresses of the defective access lines are stored in the list. New addresses are received from a host device for incoming access requests. The new addresses are compared to the stored addresses. Based on this comparison, one or more of the new addresses are shifted (e.g., by modifying a logical-to-physical mapping table) to avoid use of the defective access lines. Some of the new addresses are shifted to use redundant access lines.