Memory Access Control via Micro-Context Identifiers
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Solution Overview
Problem
Current computer architectures lack effective protection mechanisms for software programs across different privilege levels, making them vulnerable to compromise if a program at the same privilege level becomes compromised, as there is no inherent protection between software programs within the same privilege level.
Innovation Solution
Implementing a dual execution environment with a host and auxiliary environment, where the auxiliary environment is securely partitioned and manages memory access policies using identifiers (micro-contexts) to control access to main and auxiliary memories, ensuring secure and isolated execution, and utilizing virtualization and hardware partitions to enforce access control policies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional privileged levels are used for software protection, then code execution control is maintained, but software programs within the same privilege level remain vulnerable to compromise with no protection between them
Solution Approach 1:
The execution environment is segmented into multiple isolated privilege levels (e.g., ring 0, ring 1, ring 2, ring 3) where each level has distinct access rights. This segmentation ensures that software programs at different privilege levels are protected from each other, resolving the vulnerability issue while maintaining a structured complexity that enables controlled isolation.
Solution Approach 2:
A hardware-enforced mediation mechanism is introduced between different privilege levels to control memory access rights. This intermediary layer (the privilege level hierarchy itself) mediates interactions between software programs, allowing controlled resource sharing while preventing unauthorized access, thus improving protection without requiring complete isolation.
2Reliability
If complete isolation between software programs is implemented, then security is improved, but resource sharing and interoperability are restricted
Solution Approach 1:
Different privilege levels are assigned local quality characteristics with specific access rights. Higher privilege levels can access resources of lower levels, but not vice versa. This local quality differentiation enables selective resource sharing where needed while maintaining security boundaries, allowing interoperability within defined constraints rather than complete isolation.
Solution Approach 2:
The privilege level system provides dynamic access control where the execution environment can adaptively manage resource sharing based on the current execution context. The system dynamically enforces access rights according to the interacting software programs' privilege levels, enabling resource sharing when appropriate while maintaining security when necessary, rather than static complete isolation.
3Reliability
If memory access policies are enforced through hardware partitions, then access control is strengthened, but system performance may be impacted due to additional access checks
Solution Approach 1:
The hardware-enforced privilege level system provides self-service access control where the CPU automatically enforces memory access rights based on the executing program's privilege level without requiring software intervention. This hardware-level self-service mechanism reduces the overhead of software-based access control while maintaining strong security boundaries, improving performance compared to software-only solutions.
Solution Approach 2:
The system changes the parameter of access control enforcement from software-based to hardware-based by utilizing the privilege level architecture. This parameter change moves the access control function to the hardware level where it can operate with minimal performance impact, as the CPU naturally incorporates privilege level checking into its execution pipeline rather than requiring additional software overhead.
Data Source
AI summary
Embodiments of apparatuses, articles, methods, and systems for associating identifiers with memory locations for controlling memory accesses are generally described herein. Other embodiments may be described and claimed.