Memory Access Model Construction via Page Table Monitoring
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Solution Overview
Problem
The existing methods for constructing memory access models consume excessive memory resources, leading to performance issues and potential system breakdowns due to the need to store memory access addresses, which exacerbates the gap between processor speed and memory access speed.
Innovation Solution
A method that involves obtaining a page table for a target process, clearing the Present bit in each page table entry, monitoring the process for missing page interrupts, and incrementing access times to construct a memory access model without recording memory access addresses, thereby reducing memory consumption and performance impact.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If memory access addresses are stored in a designated area to construct a memory access model, then the memory access model can be constructed, but memory resources will be consumed excessively and system performance will be affected
Solution Approach 1:
The patent extracts only the essential information needed for memory access model construction (access count and timing) from the complete memory access address data. Instead of storing entire memory access addresses, the system only records whether a memory access occurred and when, significantly reducing memory consumption while maintaining the ability to construct accurate memory access models.
Solution Approach 2:
The patent uses a simplified representation (copy) of memory access information instead of the original detailed memory access addresses. By copying only the essential characteristics (access occurrence and timing) rather than the complete address data, the system reduces memory requirements while preserving the functional capability to analyze memory access patterns.
2Reliability
If memory access addresses are stored in a designated area to construct a memory access model, then the memory access model can be constructed, but system performance may deteriorate and system breakdown may occur
Solution Approach 1:
The patent extracts only the essential information needed for memory access model construction (access count and timing) from the complete memory access address data. Instead of storing entire memory access addresses, the system only records whether a memory access occurred and when, significantly reducing memory consumption while maintaining the ability to construct accurate memory access models.
3Reliability
If memory resources are allocated for storing memory access addresses, then memory access model construction is enabled, but the gap between processor speed and memory access speed is exacerbated
Solution Approach 1:
The patent extracts only the essential information needed for memory access model construction (access count and timing) from the complete memory access address data. Instead of storing entire memory access addresses, the system only records whether a memory access occurred and when, significantly reducing memory consumption while maintaining the ability to construct accurate memory access models.
Data Source
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AI summary
Embodiments of the present invention provide a method and an apparatus for constructing a memory access model, and relate to the field of computers. The method includes: obtaining a page table corresponding to a process referencing a memory block, and clearing a Present bit included in each page table entry stored in the page table; monitoring the process referencing the memory block in real time and starting timing; if the process referencing the memory block generates a missing page interrupt event when accessing a page in the memory block, increasing the number of access times of the accessed page; and constructing a memory access model of the memory block according to the number of access times of each page in the memory block and time obtained through timing, where the memory access model at least includes the number of access times and an access frequency of each page in the memory block. The apparatus includes: a first obtaining module, a first monitoring module, a first increasing module, and a second obtaining module. The present invention can reduce the memory consumption and an impact on the system performance, and avoid a system breakdown.