Memory Access Parallelism for Redundant Data Retrieval
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Solution Overview
Problem
Existing memory accessing devices suffer from inefficiency due to the need to read or write entire memory blocks when only a portion of the data is required, leading to suboptimal execution performance.
Innovation Solution
A method and device that fetch and decode multiple instructions to determine if they perform the same operation on the same memory block, allowing for simultaneous execution of operations on corresponding memory units within a single memory block access, thereby reducing redundant data retrieval or storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the processor reads the entire memory block when accessing one memory unit, then the memory access operation is simple and straightforward, but the execution efficiency deteriorates due to reading unnecessary memory units
Solution Approach 1:
The memory block is segmented into multiple memory units, and the processor is configured to identify and access only the specific memory unit required by the instruction, rather than reading the entire memory block. This segmentation allows selective access to relevant data portions, improving execution efficiency by avoiding retrieval of unnecessary memory units.
2Productivity
If multiple instructions access different memory units within the same memory block, then each instruction can be processed independently, but the number of memory accesses increases reducing overall performance
Solution Approach 1:
Multiple instructions that access different memory units within the same memory block are merged into a single memory access operation. The processor identifies that multiple instructions target the same memory block and combines their access requests, performing one unified read or write operation to retrieve or store data for all relevant memory units, thereby reducing the total number of memory accesses and improving processing speed.
Data Source
AI summary
A memory accessing method including the following steps is provided. Firstly, two instructions are fetched. Next, the two instructions are respectively decoded to obtain two operation fields and two address fields. The two operation fields indicate the type of operation in accessing the memory. One of the address fields includes a first upper address corresponding to the first memory block and a first lower address corresponding to a first memory unit of the first memory block. The other one of the two address fields includes a second upper address corresponding to the second memory block and a second lower address corresponding to a second memory unit of the second memory block. Then, whether two instructions are performing the same type of operation on the same memory block is determined. If yes, the type of operation indicated by the two operation fields is performed on the corresponding memory block parallelly.