Memory Access IC With Redundant DDR Copies for ASIL-D Storage
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Solution Overview
Problem
The evolution of intelligent driving algorithms requiring higher safety levels (ASILD) leads to storage shortages in DDR SDRAMs of intelligent driving chips, which are typically designed for lower safety levels (ASILB), resulting in insufficient storage for functions needing high safety levels.
Innovation Solution
An integrated circuit (IC) for memory access that converts original data into two copies, writes them to separate memory modules, and ensures consistent read results, allowing a memory controller to access a low-safety-level DDR for high-safety-level functions by maintaining data consistency across modules.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If a processor and RAM are used for control and decision making algorithms requiring ASILD safety level, then computing power and storage capacity increase, but storage shortage occurs leading to insufficient storage for high safety level functions
Solution Approach 1:
The patent creates two identical copies of data in separate memory modules and performs redundant reads to verify consistency. This copying approach enables the system to use lower safety level memory components while achieving higher functional safety through operational redundancy and verification, effectively resolving the contradiction between storage capacity and reliability.
2Device complexity
If DDR SDRAM designed for ASILB safety level is used in intelligent driving chips, then device complexity and cost are reduced, but storage insufficiency occurs for ASILD functions
Solution Approach 1:
The patent makes lower safety level DDR SDRAM components perform higher safety level functions by implementing redundant read operations and consistency verification. This multi-functionality approach allows ASILB memory to serve ASILD requirements, increasing effective storage capacity without proportionally increasing device complexity.
3Reliability
If redundant memory modules are introduced to ensure data consistency for high safety level functions, then functional safety is improved, but device complexity increases
Solution Approach 1:
The patent implements self-verification where the memory system automatically performs redundant reads and checks data consistency without external intervention. This self-service mechanism improves functional safety while minimizing the increase in device complexity, as the verification process is integrated into the normal memory access operations.
Data Source
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AI summary
Embodiments of this disclosure disclose an integrated circuit for memory access, a processing method, an electronic device, and a medium. The IC includes: a first bit width converting module, configured for: converting a first write access signal of a processor into a second write access signal including two copies of the original to-be-written data; a first memory controlling module, configured for: converting target to-be-written data in the second write access signal into at least one group of first to-be-written data meeting a first protocol supported by a memory physical layer interface, and determining at least one group of third write access signals corresponding respectively to the at least one group of first to-be-written data, wherein the at least one group of first to-be-written data respectively includes two copies of identical first to-be-written data coming respectively from the two copies of the original to-be-written data; and the memory physical layer interface, configured for: converting the at least one group of third write access signals respectively into two fourth write access signals meeting a memory protocol, and transmitting the fourth write access signals respectively to a respective memory module. With embodiments of this disclosure, it is enabled to effectively meet a storage need of a function needing a high safety level based on a memory of a low safety level.