Memory Access Time Circuit Using Read-Data Toggling
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Solution Overview
Problem
Existing methods for measuring non-volatile memory (NVM) access time are inaccurate and time-consuming due to reliance on external clocks, which introduce measurement errors through input and output delays in the external data path.
Innovation Solution
A circuit and method using toggling of data read from the memory to generate a new clock, independent of external clocks, allowing for accurate access time measurement by counting reads at different addresses with a finite state machine.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If external clock is used to measure access time, then measurement can be performed, but measurement accuracy deteriorates due to input and output delays in external data path
Solution Approach 1:
The patent extracts the harmful external data path delays from the measurement system by generating the clock signal internally within the memory device rather than using an external clock. This removes the source of measurement errors caused by external path delays while maintaining the ability to perform accurate access time measurements.
Solution Approach 2:
The patent introduces an intermediary internal clock signal generated by the memory device itself as a mediator between the read operation and the measurement process. This internal clock eliminates the harmful external data path while still providing the necessary timing reference for accurate access time measurement.
2Measurement precision
If external machine is used for measurement during electrical wafer sorting, then access time can be measured, but testing time increases significantly
Solution Approach 1:
The patent enables the memory device to perform self-measurement of its access time by generating internal clock signals and conducting read operations autonomously. This eliminates the need for time-consuming external machine measurements during electrical wafer sorting, significantly reducing testing time while maintaining measurement accuracy.
Solution Approach 2:
The patent performs preliminary actions by pre-loading alternating data patterns into the memory array before measurement. This preparation enables rapid sequential read operations that can be timed accurately without requiring external intervention during the actual measurement process, thereby reducing overall testing time.
3Measurement precision
If high frequency external clock is used for accurate measurement, then measurement accuracy improves, but device complexity increases
Solution Approach 1:
The patent employs dynamic clock generation where the internal clock frequency is adaptively adjusted based on the measured access time characteristics. This dynamic approach allows accurate measurement without requiring a fixed high-frequency external clock, thereby reducing device complexity while maintaining measurement precision.
Data Source
AI summary
Memory access time is determined via an access time calculator including a read data port coupled to a memory storing alternate runs of data at different memory addresses. The read data port receives data read from the memory with a memory access time in a sequence of read events from different memory addresses. The data read in subsequent read events in the sequence exhibits toggling in response to the alternate runs of data. An edge detector detects toggling of data read from the memory which indicates the end of a previous read event in the sequence of read events. Triggering circuitry coupled to the edge detector produces a trigger signal to start a new read event in the sequence of read events in response to detected toggling. A duration of the alternate runs of data in the sequence of read events is indicative of the access time to the memory.