Memory Access Management via Virtual Channel Tagging

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Solution Overview

Problem

Processors with multiple requestors face performance limitations due to high bandwidth and latency requirements, as well as physical constraints, which are exacerbated by limited bandwidth among requestors.

Innovation Solution

A method and apparatus for managing memory access by assigning tags to requests from devices, using a linked list structure and content addressable memory to track virtual channel identifiers, ensuring responses are transmitted in order and efficiently managed.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple requestors access memory simultaneously, then processor functionality and versatility are improved, but bandwidth limitations and latency increase causing performance degradation

Engineering Contradiction:
Improveprocessor functionalityVSAvoidperformance
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent segments the memory access system into multiple virtual channels, each handling different requestors or request types independently. This segmentation allows simultaneous access from multiple requestors without contention on a single queue, resolving the contradiction by enabling both versatility and maintaining performance through parallel processing paths.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary arbitration mechanism that manages requests between multiple requestors and the memory interface. This intermediary uses virtual channel tagging and linked list structures to organize and prioritize requests, preventing bandwidth contention while maintaining support for multiple requestors, thus preserving both versatility and performance.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If bandwidth among requestors is limited, then physical constraints are reduced, but performance of the processor is hindered

Engineering Contradiction:
ImprovebandwidthVSAvoidprocessor performance
Core Design Contradiction:
Quantity of substanceVSProductivity

Solution Approach 1:

The patent implements dynamic bandwidth allocation through virtual channel prioritization and arbitration. Instead of static bandwidth limits, the system dynamically adjusts which requestors receive bandwidth based on current system state, latency requirements, and virtual channel priorities. This dynamic approach allows the system to work within physical bandwidth constraints while maximizing processor performance through intelligent resource allocation.

Inventive Principle:
Principle #15Dynamics

3Loss of time

If latency requirements of requestors are stringent, then response time is reduced, but complexity of managing multiple virtual channels increases

Engineering Contradiction:
ImprovelatencyVSAvoidmanagement complexity
Core Design Contradiction:
Loss of timeVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-organizing requests into virtual channels with assigned tags before memory access occurs. Linked list structures are prepared in advance for each virtual channel, and arbitration decisions are made based on pre-established priorities. This preliminary organization reduces latency by eliminating runtime sorting complexity while managing the complexity through structured, pre-configured data structures.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9431105B2Method and apparatus for memory access management
Publication Date: 2016.08.30 MARVELL ASIA PTE LTD
  • US9431105B2 patent drawing
  • US9431105B2 patent drawing
  • US9431105B2 patent drawing

AI summary

In an embodiment, a method for managing access to memory includes receiving requests for access to a memory from one or more devices, each particular request associated with one of a plurality of virtual channels. A tag is assigned to each request received. Each tag assigned is added to a linked list associated with the corresponding virtual channel. Each request received with the assigned tag is transmitted to the memory. Responses to the requests are received from the memory, each response having an associated tag, and the responses received are sent to the one or more devices based on the corresponding linked list and the corresponding tag.