Memory Activate Signaling Using Precharge Valid Bits
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Solution Overview
Problem
Existing memory devices face challenges in transmitting additional activate information without increasing command/address (CA) bus pins, clock cycles, or circuit area, which impacts performance and flexibility in memory operations.
Innovation Solution
Utilize unused valid (V) bits from previous commands to transmit additional activate information, allowing flexible page size activation without increasing tRCD time, CA bus pins, or adding circuit area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If additional activate information is transmitted using existing command structures, then memory device flexibility is improved, but command cycle time increases
Solution Approach 1:
The patent applies preliminary action by transmitting additional activate information in advance during a precharge command cycle, before the actual activate command is executed. This allows the memory device to prepare for subsequent operations ahead of time, maintaining flexibility while avoiding time penalties during critical activate cycles.
Solution Approach 2:
The patent utilizes periodic action by embedding additional activate information transmission within the periodic precharge command structure. This integrates the additional information transfer into existing periodic command cycles rather than requiring separate dedicated transmission cycles.
2Adaptability or versatility
If additional activate information is transmitted on subsequent column command, then memory device flexibility is improved, but circuit area increases
Solution Approach 1:
The patent applies universality by enabling the precharge command to serve dual functions: both completing the precharge operation and transmitting additional activate information. This multi-functionality eliminates the need for dedicated circuitry solely for information transmission, reducing overall circuit area while maintaining flexibility.
Solution Approach 2:
The patent utilizes parameter changes by modifying the precharge command parameters to include additional activate information bits. This allows existing command structures to convey more information by changing their parameter content rather than requiring additional physical transmission channels or circuitry.
3Use of energy by moving object
If page size is decreased to reduce activation power, then power consumption is reduced, but row address terms increase
Solution Approach 1:
The patent applies segmentation by dividing the transmission of row address information across multiple command cycles. Additional row address terms are transmitted incrementally through precharge and activate commands rather than requiring a single large address field, managing complexity while enabling smaller page sizes.
Data Source
AI summary
A method and a device is provided for utilizing unused valid (V) bits residing on a previous command to transmit additional activate information to a memory device. Additional activate information may be transmitted to the memory device without increasing the tRCD time, or increasing the command/address (CA) bus pins, or adding additional circuit area, thereby reducing the impact on the performance of the memory device.