Nonvolatile Memory Programming with Adaptive ISPP Verification

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Solution Overview

Problem

Existing nonvolatile memory devices face inefficiencies in programming operations due to the inability to adjust program voltage levels effectively during the incremental step pulse program (ISPP) method, leading to suboptimal performance and increased program loop requirements.

Innovation Solution

A memory device and method that adjusts the increase in program voltage levels based on the results of previous program verification operations, using an ISPP method to optimize the program loops by varying the voltage increase in subsequent loops based on the number of cells exceeding a pre-target threshold voltage level.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a fixed increment step pulse program (ISPP) method is used with constant voltage increase in each program loop, then the programming operation can be performed systematically, but the program speed is suboptimal and requires increased number of program loops

Engineering Contradiction:
Improveprogram speedVSAvoidnumber of program loops
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent applies dynamics by making the voltage increment dynamic rather than fixed. The controller adjusts the voltage increment amount in each program loop based on verification results from previous loops. Specifically, when verification fails, the voltage increment is increased to accelerate threshold voltage changes, while when verification succeeds, the increment is reduced for precision. This dynamic adjustment optimizes program speed and reduces the number of loops required.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements feedback by using verification results from each program loop to control the voltage increment of the next loop. The verification operation checks whether memory cells have reached the target threshold voltage, and this information feeds back to the controller which then determines the appropriate voltage increment for the subsequent program loop. This closed-loop feedback mechanism ensures optimal programming efficiency.

Inventive Principle:
Principle #23Feedback

2Productivity

If the program voltage level is increased rapidly to reduce programming time, then program speed improves, but the stability and precision of threshold voltage control deteriorates

Engineering Contradiction:
Improveprogram speedVSAvoidthreshold voltage control precision
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent uses dynamic voltage increment adjustment to balance speed and precision. Early program loops use larger voltage increments to quickly approach the target threshold voltage, improving initial program speed. As verification succeeds and the target is approached, the voltage increment automatically reduces, enabling precise threshold voltage control and preventing overshoot, thus maintaining manufacturing precision.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent employs periodic verification operations interspersed with program loops to monitor threshold voltage progression. This periodic action allows the system to assess whether cells are approaching the target voltage and adjust the voltage increment accordingly, ensuring both rapid progression and precise final control throughout the programming process.

Inventive Principle:
Principle #19Periodic action

3Device complexity

If a uniform voltage increment is applied in all program loops, then the control algorithm is simple, but the adaptability to different cell states and verification results is poor

Engineering Contradiction:
Improvecontrol algorithm complexityVSAvoidadaptability to verification results
Core Design Contradiction:
Device complexityVSAdaptability or versatility

Solution Approach 1:

The patent makes the control algorithm dynamic by adjusting voltage increments based on verification results. The controller determines different voltage increment amounts for different program loops according to whether verification succeeded or failed in previous loops. This dynamic approach significantly improves adaptability to different cell states while maintaining reasonable algorithm complexity through systematic adjustment rules.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the voltage increment parameter adaptively based on verification outcomes. When verification fails, the voltage increment parameter is increased to accelerate programming. When verification succeeds, the parameter is decreased for precision. This parameter change strategy enables the system to adapt to different cell states and programming progress stages effectively.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the speed and stability of threshold voltage level adjustments, minimizing the number of program loops required for successful programming and achieving effective cell distribution.

Implementation Method 1

The nonvolatile memory device may perform program and erase operations on the cell by changing the threshold voltage of the cell as electrons are moved by a strong electric field that is applied to a thin oxide film of the cell

Methodology Applied
Scientific EffectElectric field: Electric Field

Implementation Method 2

a verification operation of checking whether threshold voltage levels of the memory cells selected as the program target have reached a target voltage level may be performed

Methodology Applied
Scientific EffectThreshold voltage detection: Electrical Resistance

Data Source

PatentUS12505882B2Apparatus and method for programming and verifying data in a nonvolatile memory device
Publication Date: 2025.12.23 SK HYNIX INC
  • US12505882B2 patent drawing
  • US12505882B2 patent drawing
  • US12505882B2 patent drawing

AI summary

A memory device comprising: a memory cell array comprising multiple memory cells, and a controller configured to repeatedly perform a program loop comprising a voltage application interval and a verification interval until a program operation for cells that have been connected to a word line that have been selected as a program target reach a threshold voltage level and configured to adjust an increase in a level of a program voltage that is applied to the selected word line in the voltage application interval of a second program loop following a first program loop, based on a result of a comparison between a threshold voltage level of each of cells that have been selected as a verification target, among the cells that have been connected to the selected word line, and a pre-target level in the verification interval of the first program loop, among the program loops that are repeated.