Memory System Error Correction via Adaptive Read Voltages

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Solution Overview

Problem

Existing memory systems face inefficiencies in error correction for multi-level cells due to varying error occurrence probabilities across logical pages, leading to decreased error correction efficiency.

Innovation Solution

A memory system that applies different read voltages to selected word lines and uses an error correction code circuit to detect and correct errors for each logical page, improving error correction efficiency by tailoring read operations to individual pages.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error correction is performed in units of logical pages with the same error correction capability, then uniform error correction is provided to all logical pages, but error correction efficiency decreases due to varying error occurrence probabilities across different logical pages

Engineering Contradiction:
Improveerror correction capabilityVSAvoiderror correction efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies different read voltages to different logical pages based on their specific error characteristics. Logical pages are divided into first and second groups, with different read voltages applied to each group, allowing tailored error correction approaches for pages with different error occurrence probabilities, thereby improving overall error correction efficiency

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the read voltage parameter according to the logical page being accessed. By adjusting the read voltage level based on the error characteristics of specific logical pages, the system optimizes the balance between read accuracy and error correction efficiency, addressing the contradiction between uniform capability and variable efficiency

Inventive Principle:
Principle #35Parameter changes

2Measurement precision

If different read voltages are applied to selected word lines for reading data from multi-level cells, then data retrieval accuracy improves, but the complexity of read operations increases

Engineering Contradiction:
Improvedata retrieval accuracyVSAvoidread operation complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments logical pages into different groups (first logical pages and second logical pages) and applies different read voltages to each group. This segmentation approach allows the system to manage the complexity of multiple read voltages by organizing them into distinct groups, thereby maintaining data retrieval accuracy while making the complex read operations more manageable

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS11263075B2Memory system and operating method thereof
Publication Date: 2022.03.01 SK HYNIX INC
  • US11263075B2 patent drawing
  • US11263075B2 patent drawing
  • US11263075B2 patent drawing

AI summary

Disclosed is a memory system and a method of operating the memory system. The memory system includes a semiconductor memory device configured to read data stored in a selected logical page among a plurality of logical pages by applying different read voltages to a selected word line corresponding to the plurality of logical pages. The memory system also includes a controller configured to perform an operation for detecting and correcting an error of the data whenever each of the read voltages is applied to the selected word line.