Memory Package Address-Delay Mapping for One-Shot Signal Training
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Solution Overview
Problem
In memory systems with multiple memory devices connected to a single memory controller, signal integrity issues arise due to high output impedance, leading to ineffective transmission of signals to the memory devices.
Innovation Solution
A buffer device is introduced between the memory controller and memory devices to drive and transfer signals with sufficient strength, and performs a training operation using address-delay mapping, setting different delays and addresses for sub-training data stored in different memory regions, allowing for efficient one-shot training.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If multiple memory devices are connected to a single memory controller, then data transmission capacity is improved, but signal integrity deteriorates due to high output impedance
Solution Approach 1:
A buffer device is introduced as an intermediary component between the memory controller and multiple memory devices. The buffer device receives signals from the memory controller, drives them with sufficient strength, and transfers them to the memory devices, thereby resolving the signal integrity issue caused by high output impedance while maintaining the ability to communicate with multiple devices
2Reliability
If traditional training operations are performed on multiple memory devices, then signal synchronization is achieved, but training time increases due to sequential operations
Solution Approach 1:
The training operations for multiple memory devices are merged into a single simultaneous operation. The buffer device performs training with all memory devices at the same time rather than sequentially, thereby maintaining synchronization reliability while significantly reducing training time
Solution Approach 2:
The buffer device performs preliminary actions by setting different delays on sub-training data before storing them in different memory regions. This preliminary delay setting enables the buffer device to compensate for signal propagation differences and achieve proper synchronization across all memory devices during the simultaneous training operation
Data Source
AI summary
A memory package includes a data input/output pin, a data strobe pin, a plurality of memory devices, and a buffer device. The data input/output pin receives a data signal. The data strobe pin receives a data strobe signal. The plurality of memory devices operate based on the data signal and the data strobe signal. The buffer device is between the data input/output pin, the data strobe pin and the plurality of memory devices, and performs a training operation based on training data and the data strobe signal in response to the data signal including the training data and the data strobe signal being received. During the training operation, the buffer device sets different delays on a plurality of sub-training data included in the training data, and the sub-training data on which the different delays are set are stored in different memory regions of the plurality of memory devices.