Memory Address Encryption for DRAM Row Hammer Mitigation

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Solution Overview

Problem

Existing techniques for mitigating row hammer attacks on dynamic random access memory (DRAM) are ineffective due to the reversibility of address hashes, allowing attackers to exploit the relationship between memory addresses and DRAM rows, leading to data corruption and system crashes.

Innovation Solution

Implementing encryption on memory addresses using cryptographic keys that are unique to each system initialization, randomizing the relationship between DRAM rows and addresses, and encrypting both addresses and data to thwart row hammer attacks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a fixed address hash algorithm is used for memory mapping, then system performance and simplicity are improved, but security against row hammer attacks deteriorates because the algorithm is easy to reverse-engineer

Engineering Contradiction:
Improvememory access performanceVSAvoidsecurity against row hammer attacks
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies dynamics by making the address hash algorithm changeable over time. Specifically, the address hash is randomized at system boot time, creating a new mapping between memory addresses and physical rows each time the system starts. This temporal variation prevents attackers from using static analysis to determine row relationships, while maintaining consistent performance during each system's operation.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameters of the address hash algorithm by introducing randomization factors. Instead of using a fixed, deterministic hash function, the system modifies the hash parameters (such as mixing in random values or using different hash seeds) at each boot, thereby changing the mapping relationship without affecting the fundamental memory access mechanism.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If frequent DRAM refreshing is implemented, then data integrity is improved, but system performance deteriorates due to increased overhead

Engineering Contradiction:
Improvedata integrityVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies preliminary action by proactively randomizing the address hash at system boot time, before any potential row hammer attack can occur. This preventive measure eliminates the need for continuous monitoring and frequent refreshing that would otherwise be required to detect and mitigate attacks, thereby maintaining data integrity without the ongoing performance overhead.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent converts the potential harm of row hammer attacks into a benefit by using the same DRAM refresh mechanism that was previously a vulnerability. The randomization causes attack traffic to be dispersed across many different physical rows, transforming concentrated harmful row activations into benign, distributed access patterns that do not cause corruption.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Reliability

If detection mechanisms are added to identify row hammer attacks, then security monitoring is improved, but system complexity increases

Engineering Contradiction:
Improveattack detection capabilityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies inversion by reversing the traditional security approach. Instead of trying to detect and respond to attacks (which requires complex monitoring systems), the system inverts the problem by making detection impossible for attackers through address randomization. The security mechanism becomes transparent to normal operation but fundamentally disrupts attack vectors.

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentUS12632396B2Mitigating row hammer attacks through memory address encryption
Publication Date: 2026.05.19 APPLE INC
  • US12632396B2 patent drawing
  • US12632396B2 patent drawing
  • US12632396B2 patent drawing

AI summary

In an embodiment, a system employs encryption on memory addresses generated by a source circuit that generates memory transactions (e.g., a processor such as a central processing unit (CPU), a graphics processing unit (GPU), various embedded processors or microcontrollers; or a peripheral device. The encrypted memory address corresponds to the row that is activated for the memory transaction, instead of the memory address generated by the source circuit.