Memory Address Marking for Real-Time Fault Isolation

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Solution Overview

Problem

Semiconductor memories face reduced reliability and shortened service life due to poor or damaged storage units, which existing technologies fail to effectively address by marking and avoiding faulty units in real-time during operations.

Innovation Solution

A read/write method and memory system that marks storage units with errors in real-time using a lookup table, enabling or disabling addresses based on data integrity, and adjusts operations accordingly to prevent data errors and losses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If complexity level of memory circuits is increased, then storage capacity is improved, but reliability is reduced due to poor or damaged storage units

Engineering Contradiction:
Improvestorage capacityVSAvoidmemory reliability
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The memory system is segmented into multiple storage units, each with its own address. The lookup table divides the memory space into manageable segments that can be independently monitored and marked as enabled or disabled, allowing the system to maintain high storage capacity while isolating faulty units to preserve overall reliability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A lookup table acts as an intermediary between the memory controller and the storage units. This intermediary structure stores the enabled/disabled status of each storage unit, enabling the system to manage complex memory circuits while maintaining reliability by filtering out damaged units through the lookup table before data operations occur.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If real-time error detection and marking is implemented, then reliability is improved, but device complexity is increased due to lookup table and additional operations

Engineering Contradiction:
Improvememory reliabilityVSAvoidsystem complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Instead of modifying the physical memory structure, the system creates a virtual copy of the memory address space through the lookup table. This copy contains the enabled/disabled status information, allowing real-time error detection and marking without physically altering the memory hardware, thus improving reliability while minimizing added complexity.

Inventive Principle:
Principle #26Copying

Solution Approach 2:

The system changes the parameter of each storage unit from a simple binary state to a ternary state by adding the enabled/disabled marking in the lookup table. This parameter change allows the system to track and manage storage unit status dynamically, improving reliability through real-time error detection without requiring fundamental hardware changes.

Inventive Principle:
Principle #35Parameter changes

3Device complexity

If damaged storage units are not marked and avoided, then device complexity is reduced, but data errors and losses occur

Engineering Contradiction:
Improvesystem complexityVSAvoiddata integrity
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The system performs preliminary marking of damaged storage units in the lookup table before data read/write operations occur. By pre-identifying and marking faulty storage units as disabled, the system prevents data errors and losses without requiring complex real-time intervention during data operations, thus maintaining data integrity while keeping the system relatively simple.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The lookup table provides continuous feedback about the status of each storage unit. When a storage unit is detected as damaged, the system writes the disabled status back to the lookup table, creating a feedback loop that prevents future operations on faulty units. This simple feedback mechanism ensures data integrity without adding significant system complexity.

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11881240B2Systems and methods for read/write of memory devices and error correction
Publication Date: 2024.01.23 CHANGXIN MEMORY TECH INC
  • US11881240B2 patent drawing
  • US11881240B2 patent drawing
  • US11881240B2 patent drawing

AI summary

A read/write method and a memory are provided. The read/write method includes: issuing a read command to a memory, wherein the read command points to an address; reading to-be-read data from a storage unit corresponding to the address to which the read command points; and in response to an error occurring in the to-be-read data, marking the address to which the read command points as disabled. When executing a read/write operation on the memory, the address of the storage unit is marked to distinguish an enabled storage unit from a failed storage unit in real time. A data error or a data loss can be avoided, thereby greatly improving the reliability and the service life of the memory.