Memory Address Marking for Invalid Cell Read-Write Recovery

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Solution Overview

Problem

Semiconductor memory devices face reliability issues due to defective or damaged memory cells, leading to data errors and reduced lifespan, as existing error correction codes cannot consistently correct errors across multiple affected cells, rendering entire memory segments unusable.

Innovation Solution

A method that marks invalid memory cells in real-time during read/write operations and backs up address information into non-volatile memory, ensuring only valid cells are accessed, thereby preventing data errors and prolonging device lifespan.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error correction codes are used to correct errors in memory cells, then data accuracy is improved, but multiple affected cells cause the entire memory segment to become unusable

Engineering Contradiction:
Improvedata accuracyVSAvoidusable memory capacity
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent divides the memory system into two independent parts: volatile memory cells for data storage and a separate lookup table for tracking valid/invalid addresses. This segmentation allows the error correction to work on individual cells without compromising the entire memory segment, as the lookup table independently manages address validity information.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a lookup table as an intermediary structure that mediates between the memory cells and the control logic. This lookup table stores address information and validity marks, acting as a buffer that prevents error propagation to the entire memory segment while still enabling comprehensive error tracking and management.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If memory cells are marked as invalid when errors occur, then data errors are prevented, but the lifespan of the memory device is reduced due to loss of usable cells

Engineering Contradiction:
Improvedata error preventionVSAvoiddevice lifespan
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent implements a mechanism to discard only the specific invalid address information from the lookup table while preserving the physical memory cell. The marked invalid addresses can be recovered or reallocated through address translation, allowing the memory device to maintain high reliability while maximizing the utilization of physical memory resources throughout its lifespan.

Inventive Principle:
Principle #34Discarding and recovering

3Reliability

If address information is backed up into non-volatile memory, then marked states are maintained across power cycles, but write operations on invalid cells may still occur

Engineering Contradiction:
Improvemark persistenceVSAvoidoperation safety
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent performs preliminary validation by checking the lookup table before executing any read or write operations. The control logic queries the validity mark in advance, and only permits operations on addresses marked as valid. This preliminary action prevents unsafe operations on invalid cells while maintaining the persistence of mark information in non-volatile memory.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements a feedback mechanism where the control logic continuously monitors the lookup table for valid/invalid address information and adjusts operation permissions accordingly. The system reads the mark information from non-volatile memory, uses it to control access to memory cells, and updates the lookup table based on error detection, creating a closed-loop safety system.

Inventive Principle:
Principle #23Feedback

Data Source

PatentEP3985494B1Read-write method and memory device
Publication Date: 2024.01.17 CHANGXIN MEMORY TECH INC
  • EP3985494B1 patent drawingFigure 1
  • EP3985494B1 patent drawingFigure 2
  • EP3985494B1 patent drawingFigure 3

AI summary

The embodiments provide a method for reading and writing and a memory device. The method includes: applying a read command to the memory device, the read command pointing to address information; reading data to be read out from a memory cell corresponding to the address information pointed to by the read command; and setting a mark of the address information pointed to by the read command as invalid if an error occurs in the data to be read out, and backing up the address information pointed to by the read command and the mark into a non-volatile memory cell according to a preset rule. The method for reading and writing of the present invention differentiates a valid memory cell from an invalid memory cell in real time when a user performs a read/write operation on the memory device, so that data error or data loss is avoided. Therefore, the reliability of the memory device is greatly improved, and the lifespan of the memory device is prolonged. Meanwhile, the address information pointed to by the read command and the mark are backed up into the non-volatile memory cell according to the preset rule, to serve as a basis for the subsequent read/write operation, which can increase a running speed of the memory device greatly.