Semiconductor Memory Address Bus Data Mask Multiplexing
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Solution Overview
Problem
Existing semiconductor memory technologies face challenges in reducing the number of external terminals while increasing the number of data mask signal bits, leading to larger chip sizes and higher costs, as conventional methods cannot effectively mask data without increasing the number of external terminals.
Innovation Solution
The proposed solution involves an address input circuit that receives a first address signal, a second address signal, and a first data mask signal in synchronization with clock signal edges, allowing the data mask signal to be supplied at different timing, enabling mask control of data without increasing the number of external terminals, even when the number of data mask signal bits is large.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the number of data mask signal bits is increased to mask more data bytes, then the data masking capability is improved, but the number of external terminals must be increased, leading to larger chip size and higher cost
Solution Approach 1:
The patent combines the data mask signal transmission with the existing address bus by utilizing unused address signal lines. The address input circuit receives both address signals and data mask signals through the same address terminal, merging two functions into one physical interface. This eliminates the need for separate data mask terminals, thereby avoiding chip size increase while maintaining enhanced data masking capability.
Solution Approach 2:
The address terminal is designed to serve multiple functions: it can receive address signals during address phases and data mask signals during other phases. The address input circuit universally handles different signal types (address and mask) through the same physical interface, allowing the system to support both address input and data masking without requiring dedicated terminals for each function.
2Area of stationary object
If the number of external terminals is reduced to decrease chip size, then manufacturing cost is reduced, but the ability to supply sufficient data mask signals is compromised
Solution Approach 1:
The system employs periodic signal phases where the address terminal alternates between receiving address signals and data mask signals. During address phases, the terminal receives address information; during other phases, it receives data mask signals. This periodic multiplexing allows the same physical terminal to support both functions over time, reducing the need for separate terminals while maintaining full data masking capability.
Solution Approach 2:
The address input circuit dynamically switches between receiving address signals and data mask signals based on the operational phase. The circuit's input configuration is not fixed but adapts to the current operation mode, allowing flexible signal reception through the same terminal without requiring separate dedicated terminals for each signal type.
3Adaptability or versatility
If separate data mask terminals are added to increase the number of maskable data bytes, then data masking versatility is improved, but the number of external terminals increases, raising chip cost
Solution Approach 1:
The patent merges the data mask signal transmission function with the existing address bus structure. Instead of adding separate data mask terminals, the system combines mask signal reception with the address terminal, utilizing the same physical interface for both address and mask signals at different times. This merging approach increases the number of maskable data bytes without increasing terminal count, thereby avoiding increased device complexity.
Solution Approach 2:
The system adds functionality in the time dimension rather than the spatial dimension. Instead of adding more terminals (spatial expansion), the patent utilizes the time dimension by implementing phased signal reception where the address terminal handles different signal types at different time periods. This temporal multiplexing enables enhanced data masking capability without increasing the physical number of terminals.
Data Source
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AI summary
To perform mask control of data signals without increasing the number of external terminals even when the number of bits in a data mask signal is large, an address input circuit (16) sequentially receives a first address signal, a second address signal, and a first data mask signal supplied to an address terminal in synchronization with transition edges of a clock signal. Namely, the first data mask signal is supplied to the address terminal at a different timing from timing at which the first and second address signals are received i.e. is multiplexed with said address signals. The first address signal, second address signal, and first data mask signal are output, for example, from a controller accessing a semiconductor memory. A data input/output circuit (20) inputs/outputs data via a data terminal and masks at least either of write data to memory cells and read data from the memory cells in accordance with logic of the first data mask signal (BDMO-7).