Memory Address Offset for Data Transfer Error Reduction
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In hardware design, the use of FIFO for data exchange between software and hardware often results in increased error rates due to frequent adjustments of read and write pointers, especially when data width exceeds bus width, requiring multiple write and read operations with subsequent pointer adjustments.
Innovation Solution
The method involves assigning separate address sets in an electronic device's memory with a predetermined offset, allowing data writing in one mode and reading in another, independent of the other, thereby reducing the need for frequent pointer adjustments and minimizing error rates.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If data width exceeds bus width requiring multiple write operations, then data can be fully transferred, but the error rate in reading and writing increases due to frequent pointer adjustments
Solution Approach 1:
The patent segments the data transfer process by creating separate address spaces for writing and reading operations. The write address space and read address space are divided into multiple banks, allowing parallel access and reducing the frequency of pointer adjustments. This segmentation enables multiple data words to be transferred in fewer operations, thereby reducing the error rate associated with frequent pointer changes.
2Productivity
If read pointer and write pointer are changed frequently to handle multiple write operations, then data can be written completely, but the error rate increases
Solution Approach 1:
The patent introduces an intermediary mechanism in the form of separate address spaces and bank management that mediates between the write operations and read operations. This intermediary layer allows the system to handle multiple write operations without requiring frequent pointer adjustments in the read path, thus maintaining productivity while reducing errors.
3Quantity of substance
If multiple times of data writing and pointer adjustment are performed, then data exceeding bus width can be transferred, but the complexity of the data exchange process increases
Solution Approach 1:
By segmenting the address space into separate write and read banks, the patent simplifies the data exchange process for large data transfers. Each bank can be accessed independently, allowing the system to transfer data exceeding bus width without requiring complex pointer management logic in the read path, thus reducing overall process complexity.
Data Source
AI summary
A method for processing data and an electronic device are provided. The method includes: assigning first and second address sets in relation to data to be stored in a memory, a predetermined address offset is defined between the first address set and the second address set; writing the data to the first address set in response to a data write command; and reading the data from the second address set in response to a data read command.