Protection of sensitive codes

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Solution Overview

Problem

Existing electronic devices lack effective methods to protect sensitive codes and data from unauthorized access during execution, particularly through peripheral circuits that can be exploited by attackers.

Innovation Solution

A monitoring circuit detects memory access addresses and compares them with predefined addresses, controlling a clock control circuit to lock or unlock peripheral circuits based on these addresses, using a bit to enforce a deactivation or activation state, ensuring secure execution of codes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If peripheral circuits are kept accessible during code execution, then device functionality and ease of operation are maintained, but security against unauthorized access and glitch-type attacks deteriorates

Engineering Contradiction:
ImprovesecurityVSAvoiddevice functionality
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent implements dynamic control of peripheral circuit accessibility by introducing a monitoring circuit that responds to memory access addresses. When sensitive code execution is detected, the system dynamically locks peripheral circuits to prevent unauthorized access or glitch attacks, while maintaining normal functionality during non-sensitive operations. This dynamic state change resolves the contradiction between security and ease of operation.

Inventive Principle:
Principle #15Dynamics

2Reliability

If peripheral circuits are locked during code execution, then security against unauthorized access is improved, but device functionality and ease of operation deteriorates

Engineering Contradiction:
ImprovesecurityVSAvoiddevice functionality
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The system dynamically adjusts peripheral circuit accessibility based on real-time monitoring of memory access patterns. The monitoring circuit detects when sensitive code is being executed and temporarily locks peripheral circuits only during these critical periods, while maintaining normal operation during non-sensitive code execution. This selective, dynamic approach preserves both security and functionality.

Inventive Principle:
Principle #15Dynamics

3Reliability

If monitoring and control circuits are added to protect sensitive codes, then security is improved, but device complexity increases

Engineering Contradiction:
ImprovesecurityVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The monitoring circuit is designed to perform multiple functions: it monitors memory access addresses, compares them against protected address ranges, detects sensitive code execution, and triggers locking of peripheral circuits. By consolidating these security functions into a single multi-functional component, the patent minimizes the increase in device complexity while achieving comprehensive protection.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Measurement precision

If address monitoring and comparison is performed continuously, then detection precision of sensitive code execution is improved, but processing time and productivity deteriorates

Engineering Contradiction:
Improvedetection precisionVSAvoidprocessing speed
Core Design Contradiction:
Measurement precisionVSProductivity

Solution Approach 1:

The system performs preliminary action by pre-defining protected address ranges and storing them in the monitoring circuit before code execution begins. This allows the monitoring circuit to quickly compare memory access addresses against pre-established protection criteria without performing complex analysis during runtime, thereby maintaining high detection precision while minimizing processing overhead and preserving system productivity.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12572707B2Protection of sensitive codes
Publication Date: 2026.03.10 STMICROELECTRONICS (GRAND OUEST) SAS
  • US12572707B2 patent drawing
  • US12572707B2 patent drawing
  • US12572707B2 patent drawing

AI summary

In an embodiment a method includes detecting, by a monitoring circuit, on a bus of a device during execution by a processor of a code stored in a memory, an address for reading from the memory, wherein the device comprises the processor, the memory, the monitory circuit and the bus coupled to the memory, comparing, by the monitoring circuit, the address with one or more first addresses and controlling, by the monitoring circuit, a clock control circuit to prevent an activation of one or more peripheral circuits when the address is part of the one or more first addresses.