Memory Module Address Remapping for Flexible Data Width

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Solution Overview

Problem

Existing memory systems waste memory space when the width of the memory bus interface does not match the data width required by the host processor, leading to inefficiencies in memory utilization.

Innovation Solution

Implementing a memory system with configurable address remapping that allows individual memory devices to remap their address space dynamically, enabling flexible utilization of memory capacity without requiring changes to the standard DIMM interface.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If the memory bus interface width is fixed to match standard host requirements, then compatibility with host processors is improved, but memory space utilization deteriorates when the host needs less capacity

Engineering Contradiction:
Improvecompatibility with host processorVSAvoidmemory space utilization
Core Design Contradiction:
Adaptability or versatilityVSLoss of substance

Solution Approach 1:

The patent implements dynamic address remapping capability that allows memory devices to flexibly reconfigure their address space mapping based on host requirements. The system can dynamically adjust which memory chips are accessed and how addresses are mapped during operation, enabling the same physical memory configuration to adapt to different host capacity needs without wasting memory space

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the address mapping parameters dynamically through remapping logic that can alter the relationship between host addresses and physical memory chip addresses. By changing address remapping parameters, the system can make different portions of the memory array accessible depending on host requirements, thereby utilizing full memory capacity regardless of host configuration

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If additional memory devices are added to increase capacity, then memory capacity is improved, but memory space waste increases when the host cannot utilize the full capacity

Engineering Contradiction:
Improvememory capacityVSAvoidwasted memory space
Core Design Contradiction:
Quantity of substanceVSLoss of substance

Solution Approach 1:

The patent creates a universal memory system where a single memory configuration with fixed address remapping capability can serve multiple host capacity requirements. The same memory module can be used whether the host needs 9x4, 10x4, or other configurations by simply changing the address remapping settings, making the additional memory devices universally useful across different host scenarios

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent introduces address remapping logic as an intermediary layer between the host and physical memory chips. This intermediary can translate host address requests into appropriate physical chip addresses, enabling the host to access only the portion of memory it needs while the full memory capacity remains available for future or alternative uses

Inventive Principle:
Principle #24Intermediary (Mediator)

3Ease of manufacture

If memory configuration is fixed to standard DIMM interfaces, then ease of manufacture and compatibility are improved, but flexibility in accommodating different host configurations deteriorates

Engineering Contradiction:
Improvestandard DIMM interface compatibilityVSAvoidflexibility for different host configurations
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent segments the address space into multiple controllable portions that can be independently mapped to different memory chips. The address remapping logic divides the address space in a way that allows selective activation of memory capacity, enabling standard DIMM interfaces to support non-standard capacity configurations through software-controlled address mapping

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP4155953B1Enabling logic for flexible configuration of memory module data width
Publication Date: 2026.03.04 INTEL CORP
  • EP4155953B1 patent drawingFigure 1A
  • EP4155953B1 patent drawingFigure 1B
  • EP4155953B1 patent drawingFigure 2

AI summary

A memory system has a configurable mapping of address space of a memory array to address of a memory access command. A controller provides command and enable information specific to a memory device. The command and enable information can cause the memory device to apply a traditional mapping of the command address to the address space, or can cause the memory device to apply an address remapping to remap the command address to different address space.