Memory Address Verification via Write-Read Comparison
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Solution Overview
Problem
Existing memory systems fail to detect errors when valid data is written or read from incorrect addresses within a memory array, leading to reliability issues due to undetected address- and location-related errors.
Innovation Solution
Implementing address data copy verification (ADCV) by storing a write address indication within the memory array and comparing it with the read address during data retrieval to ensure data is read from the correct location, thereby enhancing the reliability of memory devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If address verification is implemented by storing and comparing write addresses, then reliability is improved, but device complexity increases
Solution Approach 1:
The memory array is divided into two distinct portions: a first portion for storing data and a second portion for storing write address indications. This segmentation allows the verification function to be implemented using existing memory structure without adding external verification hardware, thus improving reliability while minimizing complexity increase.
Solution Approach 2:
The second portion of the memory array serves multiple functions: it stores write address indications for verification purposes, and can also be used for normal data storage when verification is not required. This multi-functionality reduces the need for dedicated verification hardware, balancing reliability improvement with device complexity.
2Manufacturing precision
If write address indications are stored in the memory array, then data integrity is improved, but manufacturing precision requirements increase
Solution Approach 1:
The write address indication storage is merged with the existing memory array structure rather than being implemented as a separate verification hardware component. The address indications are stored in the second portion of the same memory array that stores data in the first portion, simplifying manufacturing while ensuring address integrity through the verification process.
Data Source
AI summary
Methods, systems, and devices for address verification for a memory device are described. When a memory device receives a write command, the memory device may store, in association with the data written, an indication of a write address associated with the write command. When the memory device receives a read command, the memory device may retrieve data and a previously stored write address associated with the retrieved data, and the memory device may verify a read address associated with the read command against the previously stored write address associated with retrieved data. Thus, for example, the memory device may verify whether data read from the memory array based on an address associated with a read command is data that, when previously written to the memory array, was written in response to a write command associated with a matching address.