Memory Address Verification via Segmented Array Storage
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Solution Overview
Problem
Existing memory systems do not adequately address the issue of address ID corruption between receiving a read command and performing the associated read operation, which can result in incorrect memory cells being read.
Innovation Solution
The memory system determines an address ID based on a received read command and maintains it in a protected state by storing it in a separate memory array. This involves validating the address ID through error control operations and comparing it with the address ID extracted from the memory cells being read.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the address ID is stored in the same memory array as the data, then the device complexity is reduced, but the reliability deteriorates due to address ID corruption
Solution Approach 1:
The patent divides the memory system into separate memory arrays: one for storing data and another for storing address IDs. This segmentation isolates the address ID storage from data storage, preventing address ID corruption while maintaining system reliability. The separate memory array for address IDs ensures that address information is protected independently from the data being accessed.
2Reliability
If error control operations are performed on the address ID, then the reliability is improved, but the productivity decreases due to additional validation steps
Solution Approach 1:
The patent performs error control operations on the address ID in advance, before the read operation is executed. The address ID is validated and protected against corruption before being used to access the memory array. This preliminary validation ensures that subsequent read operations can proceed without additional verification delays, maintaining productivity while ensuring reliability.
Data Source
AI summary
Methods, systems, and devices for address verification at a memory system are described. A memory system may determine an address identifier based on a received read command and maintain the determined address identifier in a protected state to validate a subsequent read operation. For example, the memory system may store the determined address identifier in a first memory array, separate from a second memory array that is read from in response to the read command. The memory system may also extract an address identifier from memory cells being read in response to the read command, which may include decoding or other interpreting operations performed on information read from the memory cells. The address identifier extracted from the memory cells may be compared with the address identifier determined from the read command and maintained in the protected state, which may support a determination of how to respond to the read command.