Memory Module Address Allocation via Wired Logic Contention

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Solution Overview

Problem

Existing device systems require a matching device for address allocation, making it inconvenient, especially for memory module testing or calibration, as they need to prepare specific memory controllers.

Innovation Solution

A device system with a storage unit for address allocation flag information, a contention signal output unit, and an address configuration unit that allows devices to acquire addresses through a contention mechanism without a matching device, using a wired-AND or wired-OR logic to determine available address information and allocate addresses directly by a control buffer in a memory module.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a matching device (coder) is used for address allocation, then address information can be allocated to devices, but the device complexity increases and ease of operation deteriorates

Engineering Contradiction:
Improveaddress allocation reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The device performs address allocation autonomously through a contention mechanism. The storage unit stores address allocation flag information and address information, the contention signal output unit generates contention signals based on random durations, and the address configuration unit determines available address information and writes it to the storage unit without requiring external matching devices

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent extracts the address allocation function from the matching device (coder) and integrates it into the device itself. By removing the dependency on external matching devices, the system achieves self-contained address allocation capability, reducing overall system complexity while maintaining reliability

Inventive Principle:
Principle #2Taking out (Extraction)

2Reliability

If a matching device (memory controller) is used for address allocation, then address information can be allocated to data buffers, but the ease of operation deteriorates for testing and calibration

Engineering Contradiction:
Improveaddress allocation reliabilityVSAvoidease of operation
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The control buffer performs address allocation autonomously for data buffers during testing and calibration. The contention signal output unit generates signals based on random durations, and the address configuration unit determines and allocates addresses without requiring external memory controllers, significantly simplifying the testing process

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The device can perform both normal operation and testing/calibration functions using the same address allocation mechanism. The contention-based system serves dual purposes: allocating addresses during normal operation and enabling self-testing without external controllers, thereby improving ease of operation

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Device complexity

If a contention mechanism is used for address allocation, then device complexity is reduced, but the speed of address allocation may decrease

Engineering Contradiction:
Improvedevice complexityVSAvoidaddress allocation speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The storage unit pre-stores address allocation flag information and address information, allowing the device to quickly determine available addresses during contention. The random duration mechanism in the contention signal output unit ensures fair access while the pre-configured storage structure enables rapid address selection once contention is resolved

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system dynamically adjusts the address allocation process through contention signals with random durations. The address configuration unit dynamically determines available address information based on real-time contention status, balancing allocation speed with fairness. The wired-AND logic dynamically resolves contention based on signal levels from multiple devices

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS9003154B2Device requiring address allocation, device system and address allocation method
Publication Date: 2015.04.07 MONTAGE TECHNOLOGY CO LTD
  • US9003154B2 patent drawing
  • US9003154B2 patent drawing
  • US9003154B2 patent drawing

AI summary

A device requiring address allocation, a device system, and an address allocation method. A control device in the device system transmits currently allocated address information and a contention start signal to each device requiring address allocation in the device system through a bus, and the devices requiring address allocation with address allocation flag information being that no address information is allocated output an address contention signal. When outputting the address contention signal, each device requiring address allocation determines whether the currently allocated address information is available according to whether the other devices requiring address allocation with address allocation flag information being that no address information is allocated already output address contention signals. When determining availability of currently allocated address information, the device requiring address allocation stores currently allocated address information, and modifies address allocation flag information to address information already allocated, thereby achieving address allocation for the devices.