Memory System Address Wrapping for Faulty Region Repair
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Solution Overview
Problem
Existing memory systems face challenges in efficiently backing up and restoring data from faulty memory regions without requiring extensive address mapping and potentially causing address twist issues, which complicates the repair process.
Innovation Solution
A memory system with a main memory that supports address wrapping modes, including a redundancy memory region, an address wrapper, column decoder, and data input/output circuit, which allows for sequential selection and replacement of faulty memory cells with redundancy cells, enabling efficient backup and restoration operations without extensive address transfer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If traditional address mapping methods are used for backup and restoration operations, then data can be backed up and restored, but the process becomes complex and time-consuming due to extensive address mapping requirements
Solution Approach 1:
The patent extracts the address mapping function from the traditional memory system by introducing a dedicated address wrapper circuit. This separate component handles the address transformation logic, removing the complexity from the main memory architecture while enabling efficient backup and restoration operations through automated address generation
Solution Approach 2:
The address wrapper circuit automatically generates the necessary address sequences for backup and restoration operations without requiring external address mapping instructions. The system performs self-service by autonomously managing the address transformation and memory cell selection processes
2Reliability
If traditional address mapping is performed for faulty memory region replacement, then data restoration is achieved, but address twist issues occur that complicate the repair process
Solution Approach 1:
The address wrapper acts as an intermediary between the control logic and the memory cells. It receives simple control signals and automatically generates the correct address sequences, preventing address twist issues from propagating through the system while maintaining reliable data restoration
Solution Approach 2:
Instead of having the memory system complex address mapping logic to handle replacement operations, the patent inverts the approach by having a simple control signal drive an address wrapper that automatically generates all necessary address sequences, making the repair process simpler
3Extent of automation
If manual address selection is used for backup and restoration, then precise control is achieved, but the process becomes time-consuming and less automated
Solution Approach 1:
The address wrapper pre-calculates and generates the complete sequence of addresses needed for backup and restoration operations before the actual data transfer begins. This preliminary address generation enables fully automated operations without time-consuming manual address selection
Solution Approach 2:
The address wrapper continuously generates the next address in the sequence automatically during the backup and restoration processes, eliminating interruptions for manual address input and maintaining continuous automated operation throughout the repair procedure
Data Source
AI summary
A main memory includes unit memory regions, a redundancy memory region for replacing one or more of the unit memory regions, an address wrapper for generating an address increase/decrease control signal in first and second address wrapping modes, a column decoder for sequentially selecting memory cells in a faulty memory region where a fault has occurred, among the unit memory regions in the first address wrapping mode, and sequentially selecting redundancy memory cells in the redundancy memory region in the second address wrapping mode, based on a column address and the address increase/decrease control signal, and a data input/output circuit for outputting data read from the faulty memory region as backup data to a temporary memory in the first address wrapping mode, and outputting the backup data as restoration data to the redundancy memory region in the second address wrapping mode.