Semiconductor Memory Device Air Gap Integration Density

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Solution Overview

Problem

In stacked semiconductor memory devices, the integration of memory cells is limited by the spacing between electrode films, which hinders further miniaturization and increases parasitic capacitance, affecting signal delay and data retention.

Innovation Solution

The semiconductor memory device incorporates air gaps between electrode films, a high dielectric constant film along the outer surface of these gaps, and a charge storage film to reduce parasitic capacitance, enhance data retention, and increase integration density by allowing shorter electrode film spacing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If the spacing between electrode films is reduced to increase integration density, then integration density improves, but parasitic capacitance increases

Engineering Contradiction:
Improveintegration densityVSAvoidparasitic capacitance
Core Design Contradiction:
Quantity of substanceVSObject-generated harmful factors

Solution Approach 1:

The patent introduces air gaps (porous structures) between adjacent electrode films to reduce parasitic capacitance. The air gaps create physical separation that lowers the capacitive coupling between electrodes, enabling shorter spacing without proportionally increasing parasitic capacitance, thus improving integration density while controlling harmful electrical effects.

Inventive Principle:
Principle #31Porous materials

Solution Approach 2:

The patent introduces an intermediary substance (air or dielectric material) filling the gaps between electrode films. This intermediary layer acts as a mediator that reduces direct electrical interaction between adjacent electrodes, thereby reducing parasitic capacitance while allowing the electrode films to be placed closer together for higher integration density.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Quantity of substance

If the spacing between electrode films is reduced to increase integration density, then integration density improves, but signal delay increases

Engineering Contradiction:
Improveintegration densityVSAvoidsignal delay
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The air gaps introduced as porous structures serve to reduce parasitic capacitance between electrode films. By lowering the capacitive coupling, the RC time constant is reduced, which decreases signal delay. This allows the electrode spacing to be reduced for higher integration density without proportionally increasing signal delay.

Inventive Principle:
Principle #31Porous materials

3Quantity of substance

If the spacing between electrode films is reduced to increase integration density, then integration density improves, but data retention deteriorates

Engineering Contradiction:
Improveintegration densityVSAvoiddata retention
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The air gaps between electrode films reduce parasitic capacitance and electrical interference, which helps maintain stable electrical characteristics over time. This stability is crucial for data retention in memory devices, allowing shorter electrode spacing without compromising the reliability of stored data.

Inventive Principle:
Principle #31Porous materials

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution reduces parasitic capacitance, suppresses electron diffusion between memory cells, and increases integration density by enabling shorter electrode film spacing, improving signal delay and data retention.

Implementation Method 1

incorporates air gaps between electrode films, a high dielectric constant film along the outer surface of these gaps

Methodology Applied
Scientific EffectParasitic capacitance reduction: Capacitance

Implementation Method 2

a high dielectric constant film provided along an outer surface of the air gap

Methodology Applied
Scientific EffectDielectric isolation: Dielectric

Data Source

PatentUS10734405B2Semiconductor memory device
Publication Date: 2020.08.04 KIOXIA CORP
  • US10734405B2 patent drawing
  • US10734405B2 patent drawing
  • US10734405B2 patent drawing

AI summary

According to one embodiment, a semiconductor memory device includes a substrate, a plurality of electrode films arranged along a first direction with an air gap interposed, the first direction crossing a surface of the substrate, a semiconductor member extending in the first direction, a charge storage member provided between the semiconductor member and each of the electrode films, and a high dielectric constant film provided along an outer surface of the air gap, a relative dielectric constant of the high dielectric constant film being higher than a relative dielectric constant of silicon oxide.