Memory Allocation Unit Handling for Threshold Voltage Drift
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Solution Overview
Problem
Conventional memory sub-systems experience increased errors due to threshold voltage distribution migration in memory cells, leading to incorrect data retrieval and inefficient write operations.
Innovation Solution
Managing unmapped allocation units by programming a data pattern, such as a high voltage state, and using a lower read threshold voltage for pre-read operations to accurately detect and write data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional read threshold voltage is used for pre-read operations, then read operations can be performed, but increased errors occur due to threshold voltage distribution migration
Solution Approach 1:
The patent applies preliminary action by performing a pre-read operation at a lowered read threshold voltage before the actual write operation. This pre-read detects the current state of memory cells accounting for threshold voltage migration, allowing the system to determine whether to proceed with the write operation. By acting in advance with adjusted parameters, the system prevents errors that would occur if conventional read threshold voltage were used.
Solution Approach 2:
The patent changes the read threshold voltage parameter from its conventional value to a lowered value specifically for pre-read operations. This parameter change compensates for threshold voltage distribution migration in memory cells, enabling accurate detection of memory cell states despite drift over time. The system dynamically adjusts this parameter based on the age and usage of the memory sub-system.
2Productivity
If write operations are performed without pre-read, then write speed is faster, but error rate increases due to undetected threshold voltage migration
Solution Approach 1:
The patent introduces a preliminary pre-read operation before write operations to detect memory cell states affected by threshold voltage migration. This preliminary detection step ensures data integrity by identifying cells that should not be overwritten, while the overall write process remains efficient by only blocking writes when necessary based on the pre-read results.
Solution Approach 2:
The system uses feedback from the pre-read operation to determine whether to proceed with the write operation. The pre-read results provide feedback about the current state of memory cells, allowing the system to make informed decisions about write operations. This feedback mechanism maintains data integrity without significantly impacting write speed, as writes are only blocked when the pre-read indicates potential errors.
3Reliability
If more error correction operations are performed, then data accuracy improves, but system efficiency decreases
Solution Approach 1:
The patent performs preliminary detection of threshold voltage migration effects before write operations through pre-read at lowered threshold voltage. By detecting and preventing potential errors in advance, the system avoids the need for subsequent error correction operations, thereby maintaining high system efficiency while ensuring data accuracy.
Solution Approach 2:
The patent converts the harmful effect of threshold voltage migration into a beneficial detection opportunity. By using the threshold voltage drift itself as a signal for the pre-read operation, the system identifies memory cells that need protection from write operations. This transforms a potential source of errors into a useful indicator for maintaining data integrity without requiring additional error correction overhead.
Data Source
AI summary
A system can include a memory component and a processing device. The processing device can receive an indication to remove a group of memory cells of a memory sub-system from a logical address space that is used to access the memory sub-system. The processing device can, responsive to receiving the indication, remove the group of memory cells of the memory sub-system from the logical address space. The processing device can program the group of memory cells that have been removed from the logical address space with a voltage state.


