3D Memory Discrete Charge Storage via Selective Alloy Etch
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Solution Overview
Problem
Current three-dimensional memory devices face challenges in efficiently forming discrete charge storage elements and achieving high-density memory structures due to limitations in manufacturing processes, particularly in creating vertical stacks of discrete metal and semiconductor materials with precise lateral recesses and dielectric layers.
Innovation Solution
A method involving the formation of an alternating stack of insulating and spacer material layers over a substrate, followed by the creation of memory openings with annular lateral recesses, where discrete metal portions are formed and reacted with semiconductor material to create metal-semiconductor alloy portions, which are then selectively removed to form vertical stacks of discrete semiconductor material portions, accompanied by the deposition of tunneling dielectric and semiconductor channels.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional manufacturing processes are used to form vertical stacks of metal and semiconductor materials, then device complexity is reduced, but manufacturing precision and control of lateral recesses deteriorate
Solution Approach 1:
The manufacturing process is divided into discrete sequential steps: forming alternating insulating and spacer layers, creating memory openings, forming annular lateral recesses, depositing metal portions, forming semiconductor material layers, and selectively removing metal-semiconductor alloy portions. Each step builds upon the previous one to achieve precise control over the three-dimensional structure of charge storage elements.
Solution Approach 2:
The alternating stack of insulating layers and spacer material layers is formed in advance before creating memory openings and lateral recesses. This preliminary formation of the layered structure provides a template that guides subsequent processing steps, ensuring precise positioning and dimensions of the final charge storage elements.
2Quantity of substance
If discrete charge storage elements are formed with precise lateral recesses, then memory density is improved, but ease of manufacture deteriorates
Solution Approach 1:
The structure employs nested layers where insulating layers and spacer material layers are alternately deposited to form a multi-layered stack. Memory openings are then formed through this stack, and annular lateral recesses are created within specific layers, creating a nested three-dimensional structure that maximizes memory density within the available volume.
Solution Approach 2:
The invention transitions from two-dimensional planar structures to three-dimensional vertical structures by forming vertical stacks of charge storage elements. The annular lateral recesses extend laterally from the memory opening, creating a three-dimensional configuration that increases storage capacity per unit area.
3Reliability
If vertical stacks of discrete metal and semiconductor portions are formed, then charge storage efficiency is improved, but manufacturing precision requirements increase
Solution Approach 1:
Different regions of the structure are assigned different materials and functions: insulating layers provide electrical isolation, spacer material layers define geometric boundaries, metal portions serve as sacrificial elements for alloy formation, and semiconductor material forms the charge storage portions. This local differentiation of material properties enables precise control over charge storage efficiency while managing manufacturing complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the fabrication of three-dimensional memory devices with discrete charge storage elements, enhancing memory density and efficiency by allowing for precise control of material stacks and dielectric layers, thereby improving data storage capabilities.
Implementation Method 1
forming a vertical stack of metal-semiconductor alloy portions by reacting the vertical stack of metal portions with portions of the semiconductor material layer located at levels of the insulating layers
Implementation Method 2
forming a tunneling dielectric layer and a vertical semiconductor channel in the memory opening
Data Source
AI summary
An alternating stack of insulating layers and spacer material layers can be formed over a substrate. The spacer material layers may be formed as, or may be subsequently replaced with, electrically conductive layers. A memory opening can be formed through the alternating stack, and annular lateral recesses are formed at levels of the insulating layers. Metal portions are formed in the annular lateral recesses, and a semiconductor material layer is deposited over the metal portions. Metal-semiconductor alloy portions are formed by performing an anneal process, and are subsequently removed by performing a selective etch process. Remaining portions of the semiconductor material layer include a vertical stack of semiconductor material portions, which may be optionally converted, partly or fully, into silicon nitride material portions. The semiconductor material portions and/or the silicon nitride material portions can be employed as discrete charge storage elements.


