Semiconductor Memory Read Disturbance Immunity via Alternate Current
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Solution Overview
Problem
Current semiconductor memory devices face challenges in immunity to read disturbance and random telegraph noise (RTN), which affect the reliability and performance of memory circuits, especially during read operations.
Innovation Solution
The implementation of a semiconductor memory device with an alternate current supply block that selectively supplies an alternate current based on the resistance state of the memory cell, allowing for improved read current margin and immunity to RTN by sensing both cell current and alternate current during read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional read operations are used in semiconductor memory devices, then the read operation is simple and fast, but the device is vulnerable to read disturbance and random telegraph noise (RTN)
Solution Approach 1:
The patent introduces an alternate current supply block as an intermediary component that generates a compensation current to counteract the harmful effects of read disturbance and RTN. This mediator block receives the cell current and produces an alternate current that, when combined with the cell current in the sensing block, compensates for noise and disturbance effects, thereby improving reliability without fundamentally changing the memory cell structure
Solution Approach 2:
The patent divides the read operation into separate functional blocks: a selection block for selecting memory cells, an alternate current supply block for generating compensation current, and a sensing block for detecting the combined current. This segmentation allows each block to perform its specific function optimally while maintaining overall system reliability and managing complexity through modular design
2Speed
If the memory cell resistance is reduced to improve read speed, then the read operation becomes faster, but the read current margin decreases making the device more susceptible to noise
Solution Approach 1:
The patent applies the counterweight principle by generating an alternate current that acts as a compensating force against the noise and disturbance effects. The alternate current supply block produces a current that counterbalances the harmful effects of read disturbance and RTN, allowing the memory cell to operate at lower resistance values for faster read speeds while maintaining adequate read current margin through the compensating alternate current
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution enhances the read current margin and improves the performance of memory circuits by making them immune to read disturbance and random telegraph noise, thereby ensuring reliable data retrieval.
Implementation Method 1
a sensing block configured to sense, during the read operation, at least one of a cell current flowing through the memory cell
Implementation Method 2
an alternate current supply block configured to supply, during a read operation, an alternate current corresponding to a resistance state of the memory cell
Data Source
AI summary
An electronic device includes a semiconductor memory that includes: a memory cell coupled between a first line and a second line; a first selection block configured to select the first line; a second selection block configured to select the second line; an alternate current supply block configured to supply, during a read operation, an alternate current corresponding to a resistance state of the memory cell; and a sensing block configured to sense, during the read operation, at least one of a cell current flowing through the memory cell and the alternate current.